[coreboot-gerrit] New patch to review for coreboot: 78a421a NOTFORMERGE: lenovo/x201: Fix order of SPI init.

[Vladimir Serbinenko]

Vladimir Serbinenko ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5167

-gerrit

commit 78a421a772cefb1b9ca4a8f36768cdf481c8a289
Author: Vladimir Serbinenko 
Date:   Sat Feb 8 19:00:54 2014 +0100

NOTFORMERGE: lenovo/x201: Fix order of SPI init.

The lock bit for UVSVC/LVSVC was set before both registers were programmed.

Change-Id: I000440db5c8dd2f260ebc1b69108b75621faf7b3
    Signed-off-by: Vladimir Serbinenko 
---
 src/mainboard/lenovo/x201/mainboard.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c
index c16c3a4..628c872 100644
--- a/src/mainboard/lenovo/x201/mainboard.c
+++ b/src/mainboard/lenovo/x201/mainboard.c
@@ -128,9 +128,9 @@ static void mainboard_enable(device_t dev)
    RCBA32(0x389c) = 0x0601209f;
    RCBA32(0x38b0) = 0x00000004;
    RCBA32(0x38b4) = 0x03040002;
-	RCBA32(0x38c0) = 0x00000007;
-	RCBA32(0x38c4) = 0x00802005;
    RCBA32(0x38c8) = 0x00002005;
+	RCBA32(0x38c4) = 0x00802005;
+	RCBA32(0x38c0) = 0x00000007;
    RCBA32(0x3804) = 0x3f04e008;

printk(BIOS_SPEW, "SPI configured\n");