[coreboot-gerrit] Change in coreboot[master]: src/device: Update pci_class to PCI-SIG Specification

[Nico Huber (Code Review)]

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37656 )

Change subject: src/device: Update pci_class to PCI-SIG Specification
......................................................................

src/device: Update pci_class to PCI-SIG Specification

Update based on PCI-SIG's specification:
 "PCI code and ID assignment specification, Rev 1.11 (24 Jan 2019)"

Change-Id: If51605719fd96e399aec2ae86caedda44f2648d4
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37656
Tested-by: build bot (Jenkins) 
Reviewed-by: Nico Huber 
---
M src/device/pci_class.c
1 file changed, 12 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved

diff --git a/src/device/pci_class.c b/src/device/pci_class.c
index e084c77..fcb1966 100644
--- a/src/device/pci_class.c
+++ b/src/device/pci_class.c
@@ -42,6 +42,7 @@
    { 0x06, "SATA controller" },
    { 0x07, "Serial Attached SCSI controller" },
    { 0x08, "Non-Volatile memory controller" },
+	{ 0x09, "Universal Flash Storage controller" },
    { 0x80, "Mass storage controller" }
 };

@@ -53,6 +54,8 @@
    { 0x04, "ISDN controller" },
    { 0x05, "WorldFip controller" },
    { 0x06, "PICMG controller" },
+	{ 0x07, "InfiniBand Controller" },
+	{ 0x08, "Host fabric controller" },
    { 0x80, "Network controller" }
 };

@@ -89,6 +92,7 @@
    { 0x08, "RACEway bridge" },
    { 0x09, "Semi-transparent PCI-to-PCI bridge" },
    { 0x0a, "InfiniBand to PCI host bridge" },
+	{ 0x0b, "Advanced Switching to PCI host bridge" },
    { 0x80, "Bridge" }
 };

@@ -110,6 +114,7 @@
    { 0x04, "PCI Hot-plug controller" },
    { 0x05, "SD Host controller" },
    { 0x06, "IOMMU" },
+	{ 0x07, "Root Complex Event Collector" },
    { 0x80, "System peripheral" }
 };

@@ -134,7 +139,8 @@
    { 0x10, "Alpha" },
    { 0x20, "Power PC" },
    { 0x30, "MIPS" },
-	{ 0x40, "Co-processor" }
+	{ 0x40, "Co-processor" },
+	{ 0x80, "Processor" }
 };

static const PCI_SUBCLASS serial_bus[] = {
@@ -147,7 +153,9 @@
    { 0x06, "InfiniBand" },
    { 0x07, "IPMI SMIC interface" },
    { 0x08, "SERCOS interface" },
-	{ 0x09, "CANBUS" }
+	{ 0x09, "CANBUS" },
+	{ 0x0a, "MIPI I3C SM Host Controller Interface" },
+	{ 0x80, "Serial Bus Controller" }
 };

static const PCI_SUBCLASS wireless[] = {
@@ -158,6 +166,8 @@
    { 0x12, "Broadband" },
    { 0x20, "802.1a controller" },
    { 0x21, "802.1b controller" },
+	{ 0x40, "Cellular controller/modem" },
+	{ 0x41, "Cellular controller/modem plus Ethernet (802.11)" },
    { 0x80, "Wireless controller" }
 };