Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/63089 )
Change subject: soc/mediatek/mt8186: Fix pmif setting for low power mode ......................................................................
soc/mediatek/mt8186: Fix pmif setting for low power mode
The current pmif register setting for low power mode is incorrect, which is causing suspend failure. The issue of suspend failure is that SRCLKENA0 will not be pulled down. EC will not be informed AP is suspending now becuase of this. Therefore, add pmif_spmi_set_lp_mode() to correct the setting.
This implementation is based on chapter 3.7 in MT8186 Functional Specification.
BUG=b:215639203 TEST=test of suspend and resume pass.
Signed-off-by: Zhiyong Tao zhiyong.tao@mediatek.com Change-Id: I2d02198f19f9cb052fba612c02404a6af1a10adb Reviewed-on: https://review.coreboot.org/c/coreboot/+/63089 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Yu-Ping Wu yupingso@google.com Reviewed-by: Paul Menzel paulepanter@mailbox.org --- M src/soc/mediatek/mt8186/Makefile.inc M src/soc/mediatek/mt8186/include/soc/addressmap.h A src/soc/mediatek/mt8186/include/soc/pmif.h M src/soc/mediatek/mt8186/mt6366.c A src/soc/mediatek/mt8186/pmif.c 5 files changed, 42 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Yu-Ping Wu: Looks good to me, approved
diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc index 0d56f15..5d327e0 100644 --- a/src/soc/mediatek/mt8186/Makefile.inc +++ b/src/soc/mediatek/mt8186/Makefile.inc @@ -40,7 +40,7 @@ romstage-y += ../common/timer.c timer.c romstage-y += ../common/uart.c romstage-y += ../common/wdt.c wdt.c -romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6366.c +romstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c
ramstage-y += ../common/auxadc.c @@ -64,7 +64,7 @@ ramstage-y += ../common/uart.c ramstage-y += ../common/usb.c usb.c ramstage-y += ../common/wdt.c wdt.c -ramstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6366.c +ramstage-y += ../common/pmic_wrap.c pmic_wrap.c pmif.c mt6366.c ramstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c
BL31_MAKEARGS += PLAT=mt8186 diff --git a/src/soc/mediatek/mt8186/include/soc/addressmap.h b/src/soc/mediatek/mt8186/include/soc/addressmap.h index c90e0cd..069e31d 100644 --- a/src/soc/mediatek/mt8186/include/soc/addressmap.h +++ b/src/soc/mediatek/mt8186/include/soc/addressmap.h @@ -30,6 +30,7 @@ PWRAP_BASE = IO_PHYS + 0x0000D000, DEVAPC_AO_INFRA_PERI_BASE = IO_PHYS + 0x0000E000, DEVAPC_AO_MM_BASE = IO_PHYS + 0x0000F000, + PMIF_BASE = IO_PHYS + 0x00015000, SYSTIMER_BASE = IO_PHYS + 0x00017000, I2C0_DMA_BASE = IO_PHYS + 0x00200100, I2C1_DMA_BASE = IO_PHYS + 0x00200200, diff --git a/src/soc/mediatek/mt8186/include/soc/pmif.h b/src/soc/mediatek/mt8186/include/soc/pmif.h new file mode 100644 index 0000000..0e1e1a2 --- /dev/null +++ b/src/soc/mediatek/mt8186/include/soc/pmif.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * This file is created based on MT8186 Functional Specification + * Chapter number: 3.7 + */ + +#ifndef __SOC_MEDIATEK_MT8186_PMIF_H__ +#define __SOC_MEDIATEK_MT8186_PMIF_H__ + +#include <soc/addressmap.h> +#include <types.h> + +void pmif_spmi_set_lp_mode(void); + +#endif /*__SOC_MEDIATEK_MT8186_PMIF_H__*/ diff --git a/src/soc/mediatek/mt8186/mt6366.c b/src/soc/mediatek/mt8186/mt6366.c index 30ae5e0..8dd2997 100644 --- a/src/soc/mediatek/mt8186/mt6366.c +++ b/src/soc/mediatek/mt8186/mt6366.c @@ -10,6 +10,7 @@ #include <delay.h> #include <soc/mt6366.h> #include <soc/pmic_wrap.h> +#include <soc/pmif.h> #include <soc/regulator.h> #include <timer.h>
@@ -953,6 +954,7 @@ wk_sleep_voltage_by_ddr(); wk_power_down_seq(); mt6366_lp_setting(); + pmif_spmi_set_lp_mode();
while (!stopwatch_expired(&voltage_settled)) /* wait for voltages to settle */; diff --git a/src/soc/mediatek/mt8186/pmif.c b/src/soc/mediatek/mt8186/pmif.c new file mode 100644 index 0000000..b909609 --- /dev/null +++ b/src/soc/mediatek/mt8186/pmif.c @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * This file is created based on MT8186 Functional Specification + * Chapter number: 3.7 + */ + +#include <device/mmio.h> +#include <soc/pmif.h> + +#define SLEEP_PROT_CTRL 0x3F0 + +DEFINE_BITFIELD(SPM_SLEEP_REQ_SEL, 1, 0) +DEFINE_BITFIELD(SCP_SLEEP_REQ_SEL, 10, 9) + +void pmif_spmi_set_lp_mode(void) +{ + SET32_BITFIELDS((void *)(PMIF_BASE + SLEEP_PROT_CTRL), + SPM_SLEEP_REQ_SEL, 0, + SCP_SLEEP_REQ_SEL, 0); +}
3 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one.