[coreboot-gerrit] Change in coreboot[master]: soc/amd/picasso,stoneyridge/acpi: use define for RTC_DATE_ALARM

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59586 )

Change subject: soc/amd/picasso,stoneyridge/acpi: use define for RTC_DATE_ALARM
......................................................................

soc/amd/picasso,stoneyridge/acpi: use define for RTC_DATE_ALARM

Cezanne already uses a define for this and it's better to define and use
constants instead of magic values.

Signed-off-by: Felix Held 
Change-Id: Ifa4b3b3cdb161670128b284a3396fc5a85545608
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59586
Tested-by: build bot (Jenkins) 
Reviewed-by: Marshall Dawson 
---
M src/soc/amd/picasso/acpi.c
M src/soc/amd/picasso/include/soc/acpi.h
M src/soc/amd/stoneyridge/acpi.c
M src/soc/amd/stoneyridge/include/soc/acpi.h
4 files changed, 8 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Marshall Dawson: Looks good to me, approved

diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c
index c0808d9..a90cbcf 100644
--- a/src/soc/amd/picasso/acpi.c
+++ b/src/soc/amd/picasso/acpi.c
@@ -92,7 +92,7 @@
    fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
    fadt->duty_offset = 1;	/* CLK_VAL bits 3:1 */
    fadt->duty_width = 3;	/* CLK_VAL bits 3:1 */
-	fadt->day_alrm = 0x0d;
+	fadt->day_alrm = RTC_DATE_ALARM;
    fadt->mon_alrm = 0;
    fadt->iapc_boot_arch = cfg->fadt_boot_arch; /* legacy free default */
    fadt->res2 = 0;		/* reserved, MUST be 0 ACPI 3.0 */
diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h
index 804b27c..2087690 100644
--- a/src/soc/amd/picasso/include/soc/acpi.h
+++ b/src/soc/amd/picasso/include/soc/acpi.h
@@ -8,6 +8,9 @@
 #include <device/device.h>
 #include <stdint.h>

+/* RTC Registers */
+#define RTC_DATE_ALARM		0x0d
+
 uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current,
    			  acpi_rsdp_t *rsdp);

diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c
index b2de89e..918ba5e 100644
--- a/src/soc/amd/stoneyridge/acpi.c
+++ b/src/soc/amd/stoneyridge/acpi.c
@@ -84,7 +84,7 @@
    fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;
    fadt->duty_offset = 1;	/* CLK_VAL bits 3:1 */
    fadt->duty_width = 3;	/* CLK_VAL bits 3:1 */
-	fadt->day_alrm = 0x0d;
+	fadt->day_alrm = RTC_DATE_ALARM;
    fadt->mon_alrm = 0;	/* Not supported */
    fadt->iapc_boot_arch = FADT_BOOT_ARCH;	/* See table 5-10 */
    fadt->res2 = 0;		/* reserved, MUST be 0 ACPI 3.0 */
diff --git a/src/soc/amd/stoneyridge/include/soc/acpi.h b/src/soc/amd/stoneyridge/include/soc/acpi.h
index f0c35c0..21ffd5f 100644
--- a/src/soc/amd/stoneyridge/include/soc/acpi.h
+++ b/src/soc/amd/stoneyridge/include/soc/acpi.h
@@ -12,6 +12,9 @@
    #define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042)
 #endif

+/* RTC Registers */
+#define RTC_DATE_ALARM		0x0d
+
 const char *soc_acpi_name(const struct device *dev);

#endif /* AMD_STONEYRIDGE_ACPI_H */