Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/64810 )
Change subject: mb/google/brya/var/kinox: Set memory SMBus addresses based on board rev ......................................................................
mb/google/brya/var/kinox: Set memory SMBus addresses based on board rev
Starting with id 2, boards switched the memory SMBus slave address, and use 0x50, 0x52.
BUG=b:233975373 TEST=Build and boot to Chrome OS
Signed-off-by: Dtrain Hsu dtrain_hsu@compal.corp-partner.google.com Change-Id: I5e683ffdbc0727259ee796610cd97a6e378bf335 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64810 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Ricky Chang rickytlchang@google.com Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/mainboard/google/brya/variants/kinox/memory.c 1 file changed, 10 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Ricky Chang: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/brya/variants/kinox/memory.c b/src/mainboard/google/brya/variants/kinox/memory.c index f979035..01a997e 100644 --- a/src/mainboard/google/brya/variants/kinox/memory.c +++ b/src/mainboard/google/brya/variants/kinox/memory.c @@ -2,6 +2,7 @@
#include <baseboard/gpio.h> #include <baseboard/variants.h> +#include <boardid.h> #include <gpio.h> #include <soc/romstage.h>
@@ -32,7 +33,14 @@
void variant_get_spd_info(struct mem_spd *spd_info) { + const uint32_t id = board_id(); spd_info->topo = MEM_TOPO_DIMM_MODULE; - spd_info->smbus[0].addr_dimm[0] = 0x52; - spd_info->smbus[1].addr_dimm[0] = 0x50; + + if (id >= 2) { + spd_info->smbus[0].addr_dimm[0] = 0x50; + spd_info->smbus[1].addr_dimm[0] = 0x52; + } else { + spd_info->smbus[0].addr_dimm[0] = 0x52; + spd_info->smbus[1].addr_dimm[0] = 0x50; + } }