Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41075 )
Change subject: soc/amd/picasso: Enable eSPI capability for Picasso
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Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41075/11/src/soc/amd/picasso/southb...
File src/soc/amd/picasso/southbridge.c:
https://review.coreboot.org/c/coreboot/+/41075/11/src/soc/amd/picasso/southb...
PS11, Line 210: PICASSO_LPC_IOMUX
https://review.coreboot. […]
A Mandolin build without selected SOC_AMD_COMMON_BLOCK_USE_ESPI doesn't result in the serial port on LPC working. I do however get more post codes on the LPC-attached port 0x80 LED display thing (stopped at 0x00a2 before, which seems to be the last post code before the call to fch_pre_init), so there's probably something else wrong with the LPC serial console
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Gerrit-Project: coreboot
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