Łukasz Siudut has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31435
Change subject: mb/ocp/monolake: fix for booting issues + tmp and ipmi support ......................................................................
mb/ocp/monolake: fix for booting issues + tmp and ipmi support
This change brings monolake platform to sane state when it actually boots.
First of all - we experienced booting issues during FSP-M phase. Applying fix that was introduced for wedge100s - 817994c1bec - helped and systems started to boot properly.
Secondly, changes includes: - enabled TPM1 + added entry in devicetree - configured LPC IO to make IPMI work + added entry in devicetree - introduced DSDT and SMBIOS entries for IPMI to make it detectable
Also I changed the length of SMBIOS type 38 entry. Subtracting 2 of it was effectively cutting information about register spacing, don't know why was it there on the first place.
Signed-off-by: Lukasz Siudut lsiudut@fb.com Change-Id: Ibfbe9d19c7413098c56d1b6131640097fdf731ab --- M src/arch/x86/smbios.c M src/mainboard/ocp/monolake/Kconfig M src/mainboard/ocp/monolake/devicetree.cb M src/mainboard/ocp/monolake/dsdt.asl M src/mainboard/ocp/monolake/mainboard.c M src/mainboard/ocp/monolake/romstage.c 6 files changed, 172 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/31435/1
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index c0545ce..69be77d 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -642,7 +642,7 @@ memset(t, 0, sizeof(struct smbios_type38)); t->type = SMBIOS_IPMI_DEVICE_INFORMATION; t->handle = *handle; - t->length = len - 2; + t->length = len; t->interface_type = interface_type; t->ipmi_rev = ipmi_rev; t->i2c_slave_addr = i2c_addr; diff --git a/src/mainboard/ocp/monolake/Kconfig b/src/mainboard/ocp/monolake/Kconfig index 76ecb48..70b01c3 100644 --- a/src/mainboard/ocp/monolake/Kconfig +++ b/src/mainboard/ocp/monolake/Kconfig @@ -11,6 +11,8 @@ select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT select SERIRQ_CONTINUOUS_MODE select MAINBOARD_USES_IFD_GBE_REGION + select MAINBOARD_HAS_LPC_TPM + select MAINBOARD_HAS_TPM1
config MAINBOARD_DIR string diff --git a/src/mainboard/ocp/monolake/devicetree.cb b/src/mainboard/ocp/monolake/devicetree.cb index 30d99c2..2d91b73 100644 --- a/src/mainboard/ocp/monolake/devicetree.cb +++ b/src/mainboard/ocp/monolake/devicetree.cb @@ -7,7 +7,14 @@ device pci 14.0 on end # xHCI Controller device pci 19.0 on end # Gigabit LAN Controller device pci 1d.0 on end # EHCI Controller - device pci 1f.0 on end # LPC Bridge + device pci 1f.0 on + chip drivers/pc80/tpm + device pnp 0c31.0 on end + end + chip drivers/generic/generic # BMC KCS + device pnp ca2.0 on end + end + end # LPC Bridge device pci 1f.2 on end # SATA Controller device pci 1f.3 on end # SMBus Controller device pci 1f.5 on end # SATA Controller diff --git a/src/mainboard/ocp/monolake/dsdt.asl b/src/mainboard/ocp/monolake/dsdt.asl index 1248703..e59bb32 100644 --- a/src/mainboard/ocp/monolake/dsdt.asl +++ b/src/mainboard/ocp/monolake/dsdt.asl @@ -27,6 +27,9 @@ { #include "acpi/platform.asl"
+ Name (IDTP, 0x0CA2) + Name (ICDP, 0x0CA6) + Name(_S0, Package() { 0x00, 0x00, 0x00, 0x00 }) Name(_S5, Package() { 0x07, 0x00, 0x00, 0x00 })
@@ -290,5 +293,97 @@ } }
+ Scope (_SB.PCI0.LPC0) + { + Device(SPMI) + { + Name (_HID, EisaId ("IPI0001")) + Name (_STR, Unicode ("IPMI_KCS")) + Name (_UID, 0x00) + OperationRegion (IPST, SystemIO, ICDP, 0x01) + Field (IPST, ByteAcc, NoLock, Preserve) + { + STAS, 8 + } + Method (_STA, 0, NotSerialized) { + Return (0x0f) + } + Name (ICRS, ResourceTemplate () + { + IO (Decode16, + 0x0000, + 0x0000, + 0x00, + 0x00, + _Y01) + IO (Decode16, + 0x0000, + 0x0000, + 0x00, + 0x00, + _Y02) + + }) + Method (_CRS, 0, NotSerialized) + { + CreateWordField (ICRS, _SB.PCI0.LPC0.SPMI._Y01._MIN, IPDB) + CreateWordField (ICRS, _SB.PCI0.LPC0.SPMI._Y01._MAX, IPDH) + CreateByteField (ICRS, _SB.PCI0.LPC0.SPMI._Y01._LEN, IPDL) + CreateWordField (ICRS, _SB.PCI0.LPC0.SPMI._Y02._MIN, IPCB) + CreateWordField (ICRS, _SB.PCI0.LPC0.SPMI._Y02._MAX, IPCH) + CreateByteField (ICRS, _SB.PCI0.LPC0.SPMI._Y02._LEN, IPCL) + + IPDB = IDTP + IPDH = IDTP + IPDL = 0x01 + + IPCB = ICDP + IPCH = ICDP + IPCL = 0x01 + + Return (ICRS) + } + Method (_IFT, 0, NotSerialized) { + Return (0x01) + } + Method(_SRV, 0, NotSerialized) { + Return (0x0200) + } + } + + Device(SYSR) + { + Name (_HID, EisaId ("PNP0C02")) + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CA2, + 0x0CA2, + 0x01, + 0x01, + ) + IO (Decode16, + 0x0CA6, + 0x0CA6, + 0x01, + 0x01, + ) + IO (Decode16, + 0x0CA8, + 0x0CA8, + 0x01, + 0x01, + ) + IO (Decode16, + 0x0CAC, + 0x0CAC, + 0x01, + 0x01, + ) + }) + } + } + #include "acpi/mainboard.asl" } diff --git a/src/mainboard/ocp/monolake/mainboard.c b/src/mainboard/ocp/monolake/mainboard.c index f1a3a20..eacb577 100644 --- a/src/mainboard/ocp/monolake/mainboard.c +++ b/src/mainboard/ocp/monolake/mainboard.c @@ -14,18 +14,56 @@ * GNU General Public License for more details. */
+#include <console/console.h> #include <device/device.h> +#include <smbios.h> + #if IS_ENABLED(CONFIG_VGA_ROM_RUN) #include <x86emu/x86emu.h> #endif
+#define BMC_KCS_BASE 0xca2 +#define INTERFACE_IS_IO 0x1 + +#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES) +static int mainboard_smbios_data(struct device *dev, int *handle, + unsigned long *current) +{ + int len = 0; + + // add IPMI Device Information + len += smbios_write_type38( + current, handle, + SMBIOS_BMC_INTERFACE_KCS, + 0x20, // IPMI Version + 0x20, // I2C address + 0xff, // no NV storage + BMC_KCS_BASE | INTERFACE_IS_IO, // IO port interface address + 0x40, + 0); // no IRQ + + return len; +} +#endif + +// static const unsigned char ipmi_command[] = {}; /* * mainboard_enable is executed as first thing after enumerate_buses(). * This is the earliest point to add customization. */ static void mainboard_enable(struct device *dev) { +#if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES) + dev->ops->get_smbios_data = mainboard_smbios_data; +#endif
+ printk(BIOS_INFO, "mainboard_enable() called\n"); + /* Enable access to the BMC IPMI via KCS */ + struct device *lpc_sio_dev = dev_find_slot_pnp(BMC_KCS_BASE, 0); + struct resource *res = new_resource(lpc_sio_dev, BMC_KCS_BASE); + res->base = BMC_KCS_BASE; + res->size = 1; + res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; }
struct chip_operations mainboard_ops = { diff --git a/src/mainboard/ocp/monolake/romstage.c b/src/mainboard/ocp/monolake/romstage.c index cf52c01..4784dff 100644 --- a/src/mainboard/ocp/monolake/romstage.c +++ b/src/mainboard/ocp/monolake/romstage.c @@ -17,6 +17,11 @@ #include <stddef.h> #include <soc/romstage.h> #include <drivers/intel/fsp1_0/fsp_util.h> +#include <cpu/x86/msr.h> +#include <cf9_reset.h> +#include <console/console.h> +#include <soc/pci_devs.h> +#include <soc/lpc.h>
/** * /brief mainboard call for setup that needs to be done before fsp init @@ -24,7 +29,30 @@ */ void early_mainboard_romstage_entry(void) { + /* + * Sometimes the system boots in an invalid state, where random values + * have been written to MSRs and then the MSRs are locked. + * Seems to always happen on warm reset. + * + * Power cycling or a board_reset() isn't sufficient in this case, so + * issue a full_reset() to "fix" this issue. + */ + msr_t msr = rdmsr(IA32_FEATURE_CONTROL); + if (msr.lo & 1) { + console_init(); + printk(BIOS_EMERG, "Detected broken platform state. Issuing full reset\n"); + full_reset(); + }
+ pci_write_config16(PCI_DEV(0, LPC_DEV, LPC_FUNC), LPC_IO_DEC, 0x0010); + pci_write_config32(PCI_DEV(0, LPC_DEV, LPC_FUNC), LPC_GEN1_DEC, + 0x0c0681); + pci_write_config32(PCI_DEV(0, LPC_DEV, LPC_FUNC), LPC_GEN2_DEC, + 0x0c0ca1); + pci_write_config32(PCI_DEV(0, LPC_DEV, LPC_FUNC), LPC_GEN3_DEC, + 0xfc0201); + pci_write_config32(PCI_DEV(0, LPC_DEV, LPC_FUNC), LPC_GEN4_DEC, + 0xfc0601); }
/** @@ -33,7 +61,6 @@ */ void late_mainboard_romstage_entry(void) { - }
/** @@ -41,5 +68,4 @@ */ void romstage_fsp_rt_buffer_callback(FSP_INIT_RT_BUFFER *FspRtBuffer) { - }