[coreboot-gerrit] Change in coreboot[master]: sb/amd/cimx/sb800: Fix 16-bit read/write PCI_COMMAND register

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40806 )

Change subject: sb/amd/cimx/sb800: Fix 16-bit read/write PCI_COMMAND register
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/40806/1/src/southbridge/amd/cimx/sb... 
File src/southbridge/amd/cimx/sb800/late.c:

https://review.coreboot.org/c/coreboot/+/40806/1/src/southbridge/amd/cimx/sb... 
PS1, Line 102: 	pci_write_config16(dev, PCI_COMMAND, dev->command);
> I hope you realize how hard it is to review if this doesn't change anything.

Thank you so much.
Here, it does. Old code do only a partial write of 16bit into 8.