Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin.
Guangjie Song has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86343?usp=email )
Change subject: soc/mediatek/mt8196: Remove tvdpll3 disable/enable ......................................................................
Patch Set 3:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/86343/comment/4a1f47d8_0039d0dc?usp... : PS1, Line 9: The enable operation cause tvdpll3 cannot be disabled during suspend, : so we remove it. : tvdpll3 can be enabled/disabled according to its downstream clock : demand automatically.
Do you mean we leave the enablement of tvdpll3 to hardware?
yes it is enabled automatically when its downstream clock is enabled
https://review.coreboot.org/c/coreboot/+/86343/comment/cf605196_6aedd7de?usp... : PS1, Line 16: TEST=Bootup OK and Suspend/Resume OK, with MMinfra kernel/vcp patch, : mminfra can be turned off to reduce power consumption
Please also verify the correctness of FW screen.
Done