[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: Add support to enable ISH FSP UPDs

[Wonkyu Kim (Code Review)]

Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47104 )

Change subject: soc/intel/tigerlake: Add support to enable ISH FSP UPDs
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Patch Set 1: Code-Review-1

This is not needed.  the code is not added intentionally.
FSP setting is just do pin mux while pin mux while default values are not enabled(do not pin muxs).
So, ISH GP and ISH I2C are configured by pin mux by gpio.c.