[coreboot-gerrit] Patch set updated for coreboot: 27806d0 Introduce stage-specific architecture for coreboot

1 May 2014

Furquan Shaikh (furquan@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5577
-gerrit
commit 27806d073285b69dd5c1681e827416313066a389
Author: Furquan Shaikh furquan@google.com
Date:   Wed Apr 23 10:18:48 2014 -0700
Introduce stage-specific architecture for coreboot
Make all three coreboot stages (bootblock, romstage and ramstage) aware of the
    architecture specific to that stage i.e. we will have CONFIG_ARCH variables for
    each of the three stages. This allows us to have an SOC with any combination of
    architectures and thus every stage can be made to run on a completely different
    architecture independent of others. Thus, bootblock can have an x86 arch whereas
    romstage and ramstage can have arm32 and arm64 arch respectively.
These arch specific options can be considered as either arch or modes eg: x86
    running in different modes or ARM having different arch types (v4, v7, v8). We
    have got rid of the CONFIG_ARCH option completely as every stage can have any
    architecture of its own. Thus, almost all the components of coreboot are
    identified as being part of one of the three stages (bootblock, romstage or
    ramstage). The components which cannot be classified as such e.g. smm, rmodules
    can have their own compiler toolset which is for now set to *_i386. Hence, all
    special classes are treated in a similar way and the compiler toolset is defined
    using create_class_compiler defined in Makefile.
In order to meet these requirements, changes have been made to CC, LD, OBJCOPY
    and family to add CC_bootblock, CC_romstage, CC_ramstage and similarly others.
    Additionally, CC_i386 and CC_armv7 handle all the special classes.
Few additional macros have been introduced to identify the class to be used at
    various points, e.g.: CC_$(class) derives the $(class) part from the name of
    the stage being compiled.
We have also got rid of COREBOOT_COMPILER, COREBOOT_ASSEMBLER and COREBOOT_LINKER
    as they do not make any sense for coreboot as a whole. All these attributes are
    associated with each of the stages.
Conflicts:
    	src/arch/armv7/Makefile.inc
    	src/arch/x86/Makefile.inc
Change-Id: I923f3d4fb097d21071030b104c372cc138c68c7b
    Signed-off-by: Furquan Shaikh furquan@google.com
---
 Makefile                                    | 111 ++++++++++++++++++++--------
 Makefile.inc                                |  68 ++++++++++-------
 src/Kconfig                                 |  31 ++++++++
 src/arch/armv7/Makefile.inc                 |  50 ++++++++-----
 src/arch/x86/Makefile.inc                   |  85 +++++++++++++--------
 src/arch/x86/boot/Makefile.inc              |   8 ++
 src/arch/x86/lib/Makefile.inc               |  21 ++++--
 src/cpu/Makefile.inc                        |   5 +-
 src/cpu/allwinner/a10/Kconfig               |   4 +-
 src/cpu/amd/agesa/Kconfig                   |   4 +-
 src/cpu/amd/geode_gx1/Kconfig               |   4 +-
 src/cpu/amd/geode_gx2/Kconfig               |   4 +-
 src/cpu/amd/geode_lx/Kconfig                |   4 +-
 src/cpu/amd/model_10xxx/Kconfig             |   4 +-
 src/cpu/amd/model_fxx/Kconfig               |   4 +-
 src/cpu/amd/sc520/Kconfig                   |   4 +-
 src/cpu/armltd/cortex-a9/Kconfig            |   4 +-
 src/cpu/dmp/vortex86ex/Kconfig              |   4 +-
 src/cpu/intel/ep80579/Kconfig               |   4 +-
 src/cpu/intel/fsp_model_206ax/Kconfig       |   4 +-
 src/cpu/intel/fsp_model_206ax/Makefile.inc  |   5 +-
 src/cpu/intel/haswell/Kconfig               |   4 +-
 src/cpu/intel/haswell/Makefile.inc          |   6 +-
 src/cpu/intel/model_1067x/Kconfig           |   4 +-
 src/cpu/intel/model_106cx/Kconfig           |   4 +-
 src/cpu/intel/model_2065x/Kconfig           |   4 +-
 src/cpu/intel/model_206ax/Kconfig           |   4 +-
 src/cpu/intel/model_65x/Kconfig             |   4 +-
 src/cpu/intel/model_67x/Kconfig             |   4 +-
 src/cpu/intel/model_68x/Kconfig             |   4 +-
 src/cpu/intel/model_69x/Kconfig             |   4 +-
 src/cpu/intel/model_6bx/Kconfig             |   4 +-
 src/cpu/intel/model_6dx/Kconfig             |   4 +-
 src/cpu/intel/model_6ex/Kconfig             |   4 +-
 src/cpu/intel/model_6fx/Kconfig             |   4 +-
 src/cpu/intel/model_6xx/Kconfig             |   4 +-
 src/cpu/intel/model_f0x/Kconfig             |   4 +-
 src/cpu/intel/model_f1x/Kconfig             |   4 +-
 src/cpu/intel/model_f2x/Kconfig             |   4 +-
 src/cpu/intel/model_f3x/Kconfig             |   4 +-
 src/cpu/intel/model_f4x/Kconfig             |   4 +-
 src/cpu/qemu-x86/Kconfig                    |   4 +-
 src/cpu/samsung/exynos5250/Kconfig          |   4 +-
 src/cpu/samsung/exynos5420/Kconfig          |   4 +-
 src/cpu/ti/am335x/Kconfig                   |   4 +-
 src/cpu/ti/am335x/Makefile.inc              |   5 +-
 src/cpu/via/c3/Kconfig                      |   4 +-
 src/cpu/via/c7/Kconfig                      |   4 +-
 src/cpu/via/nano/Kconfig                    |   4 +-
 src/cpu/x86/Makefile.inc                    |   6 +-
 src/cpu/x86/smm/Makefile.inc                |  30 ++++----
 src/device/Makefile.inc                     |   2 +-
 src/include/version.h                       |   3 -
 src/lib/Makefile.inc                        |   8 +-
 src/lib/coreboot_table.c                    |   3 -
 src/lib/version.c                           |  13 ----
 src/mainboard/advansus/a785e-i/Makefile.inc |   2 +-
 src/mainboard/asus/m5a88-v/Makefile.inc     |   2 +-
 src/mainboard/avalue/eax-785e/Makefile.inc  |   2 +-
 src/mainboard/bifferos/bifferboard/Kconfig  |   4 +-
 src/mainboard/packardbell/ms2290/Kconfig    |   4 +-
 src/soc/intel/baytrail/Kconfig              |   4 +-
 src/superio/Makefile.inc                    |   2 +-
 src/vendorcode/amd/agesa/f10/Makefile.inc   |   5 +-
 src/vendorcode/amd/agesa/f12/Makefile.inc   |   7 +-
 src/vendorcode/amd/agesa/f14/Makefile.inc   |   7 +-
 src/vendorcode/amd/agesa/f15/Makefile.inc   |   6 +-
 src/vendorcode/amd/agesa/f15tn/Makefile.inc |   7 +-
 src/vendorcode/amd/agesa/f16kb/Makefile.inc |   5 +-
 src/vendorcode/amd/cimx/rd890/Makefile.inc  |   6 +-
 src/vendorcode/amd/cimx/sb700/Makefile.inc  |   5 +-
 src/vendorcode/amd/cimx/sb800/Makefile.inc  |   5 +-
 src/vendorcode/amd/cimx/sb900/Makefile.inc  |   5 +-
 src/vendorcode/google/chromeos/Makefile.inc |  22 ++++--
 src/vendorcode/intel/Makefile.inc           |   5 +-
 75 files changed, 496 insertions(+), 221 deletions(-)

diff --git a/Makefile b/Makefile
index b709d14..d1d57a8 100644
--- a/Makefile
+++ b/Makefile
@@ -113,33 +113,70 @@ else
include $(HAVE_DOTCONFIG)
-ARCHDIR-$(CONFIG_ARCH_ARMV7)   := armv7
-ARCHDIR-$(CONFIG_ARCH_X86)     := x86
-
-ARCH-y := $(ARCHDIR-y)
-
-# If architecture folder name is different from GCC binutils architecture name,
-# override here.
-ARCH-$(CONFIG_ARCH_ARMV7)   := armv7
-ARCH-$(CONFIG_ARCH_X86)     := i386
-
-ifneq ($(INNER_SCANBUILD),y)
-CC := $(CC_$(ARCH-y))
-endif
-CPP := $(CPP_$(ARCH-y))
-AS := $(AS_$(ARCH-y))
-LD := $(LD_$(ARCH-y))
-NM := $(NM_$(ARCH-y))
-OBJCOPY := $(OBJCOPY_$(ARCH-y))
-OBJDUMP := $(OBJDUMP_$(ARCH-y))
-READELF := $(READELF_$(ARCH-y))
-STRIP := $(STRIP_$(ARCH-y))
-AR := $(AR_$(ARCH-y))
-
-CFLAGS += $(CFLAGS_$(ARCH-y))
-
-LIBGCC_FILE_NAME := $(shell test -r `$(CC) -print-libgcc-file-name` && \
-		      $(CC) -print-libgcc-file-name)
+# Each stage of coreboot can have a different arch. For this we need separate
+# config vars
+# bootblock arch
+ARCH-BOOTBLOCK-$(CONFIG_ARCH_BOOTBLOCK_ARMV7)    := armv7
+ARCH-BOOTBLOCK-$(CONFIG_ARCH_BOOTBLOCK_X86_32)   := i386
+
+# romstage arch
+ARCH-ROMSTAGE-$(CONFIG_ARCH_ROMSTAGE_ARMV7)      := armv7
+ARCH-ROMSTAGE-$(CONFIG_ARCH_ROMSTAGE_X86_32)     := i386
+
+# ramstage arch
+ARCH-RAMSTAGE-$(CONFIG_ARCH_RAMSTAGE_ARMV7)      := armv7
+ARCH-RAMSTAGE-$(CONFIG_ARCH_RAMSTAGE_X86_32)     := i386
+
+ARCHDIR-armv7       := armv7
+ARCHDIR-i386        := x86
+
+# Since there can be a different arch for each stage, we can have a different cc
+# for each stage
+CC_bootblock := $(CC_$(ARCH-BOOTBLOCK-y))
+CC_romstage  := $(CC_$(ARCH-ROMSTAGE-y))
+CC_ramstage  := $(CC_$(ARCH-RAMSTAGE-y))
+
+# Since there can be a different arch for each stage, we can have a different nm
+# for each stage
+NM_bootblock := $(NM_$(ARCH-BOOTBLOCK-y))
+NM_romstage  := $(NM_$(ARCH-ROMSTAGE-y))
+NM_ramstage  := $(NM_$(ARCH-RAMSTAGE-y))
+
+# Since there can be a different arch for each stage, we can have a different ld
+# for each stage
+LD_bootblock := $(LD_$(ARCH-BOOTBLOCK-y))
+LD_romstage  := $(LD_$(ARCH-ROMSTAGE-y))
+LD_ramstage  := $(LD_$(ARCH-RAMSTAGE-y))
+
+# Since there can be a different arch for each stage, we can have a different
+# objcopy for each stage
+OBJCOPY_bootblock := $(OBJCOPY_$(ARCH-BOOTBLOCK-y))
+OBJCOPY_romstage  := $(OBJCOPY_$(ARCH-ROMSTAGE-y))
+OBJCOPY_ramstage  := $(OBJCOPY_$(ARCH-RAMSTAGE-y))
+
+# CFLAGS
+CFLAGS_bootblock += $(CFLAGS_$(ARCH-BOOTBLOCK-y))
+CFLAGS_romstage += $(CFLAGS_$(ARCH-ROMSTAGE-y))
+CFLAGS_ramstage += $(CFLAGS_$(ARCH-RAMSTAGE-y))
+
+# Since there can be a different arch for each stage, we can have a different as
+# for each stage
+AS_bootblock := $(AS_$(ARCH-BOOTBLOCK-y))
+AS_romstage  := $(AS_$(ARCH-ROMSTAGE-y))
+AS_ramstage  := $(AS_$(ARCH-RAMSTAGE-y))
+
+# Since there can be a different arch for each stage, we can have a different strip
+# for each stage
+STRIP_bootblock := $(STRIP_$(ARCH-BOOTBLOCK-y))
+STRIP_romstage  := $(STRIP_$(ARCH-ROMSTAGE-y))
+STRIP_ramstage  := $(STRIP_$(ARCH-RAMSTAGE-y))
+
+LIBGCC_FILE_NAME_bootblock := $(shell test -r `$(CC_bootblock) -print-libgcc-file-name` && \
+                             $(CC_bootblock) -print-libgcc-file-name)
+LIBGCC_FILE_NAME_romstage  := $(shell test -r `$(CC_romstage) -print-libgcc-file-name` && \
+                             $(CC_romstage) -print-libgcc-file-name)
+LIBGCC_FILE_NAME_ramstage  := $(shell test -r `$(CC_ramstage) -print-libgcc-file-name` && \
+                             $(CC_ramstage) -print-libgcc-file-name)
ifneq ($(INNER_SCANBUILD),y)
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
@@ -206,6 +243,22 @@ add-special-class= \
    $(eval $(1):=) \
    $(eval special-classes+=$(1))
+# create_class_compiler: Used to create compiler tool set for
+# special classes
+# @1: special class
+# @2: compiler set to be used
+# e.g.: smm special class uses i386 as compiler set
+define create_class_compiler
+CC_$(1) = $(CC_$(2))
+LD_$(1) = $(LD_$(2))
+NM_$(1) = $(NM_$(2))
+OBJCOPY_$(1) = $(OBJCOPY_$(2))
+OBJDUMP_$(1) = $(OBJDUMP_$(2))
+STRIP_$(1) = $(STRIP_$(2))
+READELF_$(1) = $(READELF_$(2))
+CFLAGS_$(1) = $(CFLAGS_common) -Isrc/arch/$(ARCHDIR-$(2))/include
+endef
+
 # Clean -y variables, include Makefile.inc
 # Add paths to files in X-y to X-srcs
 # Add subdirs-y to subdirs
@@ -264,7 +317,7 @@ ifn$(EMPTY)def $(1)-objs_$(2)_template
 de$(EMPTY)fine $(1)-objs_$(2)_template
 $(obj)/$$(1).$(1).o: src/$$(1).$(2) $(obj)/config.h $(4)
    @printf "    CC         $$$$(subst $$$$(obj)/,,$$$$(@))\n"
-	$(CC) $(3) -MMD $$$$(CFLAGS) -c -o $$$$@ $$$$<
+	$(CC_$(1)) $(3) -MMD $$$$(CFLAGS_$(1)) -c -o $$$$@ $$$$<
 en$(EMPTY)def
 end$(EMPTY)if
 endef
@@ -285,7 +338,7 @@ printall:
    @echo alldirs:=$(alldirs)
    @echo allsrcs=$(allsrcs)
    @echo DEPENDENCIES=$(DEPENDENCIES)
-	@echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME)
+	@echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME_$(class))
    @$(foreach class,$(special-classes),echo $(class):='$($(class))'; )
endif
diff --git a/Makefile.inc b/Makefile.inc
index 315a9d9..82654c7 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -65,7 +65,7 @@ PHONY+= clean-abuild coreboot lint lint-stable build-dirs
 subdirs-y := src/lib src/console src/device src/ec src/southbridge src/soc
 subdirs-y += src/northbridge src/superio src/drivers src/cpu src/vendorcode
 subdirs-y += util/cbfstool util/sconfig util/nvramtool
-subdirs-y += src/arch/$(ARCHDIR-y)
+subdirs-y += src/arch/armv7 src/arch/x86
 subdirs-y += src/mainboard/$(MAINBOARDDIR)
subdirs-y += site-local
@@ -105,7 +105,7 @@ files-in-dir=$(filter-out $(call dir-wildcards,$(call filter-out-dirs,$(1),$(dir
 # reduce command line length by linking the objects of each
 # directory into an intermediate file
 ramstage-postprocess=$(foreach d,$(sort $(dir $(1))), \
-	$(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD) -o $$@ -r $$^ ) \
+	$(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD_ramstage) -o $$@ -r $$^ ) \
    $(eval ramstage-objs:=$(d)ramstage.o $(filter-out $(call files-in-dir,$(d),$(1)),$(ramstage-objs))))
romstage-c-ccopts:=-D__PRE_RAM__
@@ -146,10 +146,10 @@ smm-c-deps:=$$(OPTION_TABLE_H)
 define ramstage-objs_asl_template
 $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h
    @printf "    IASL       $$(subst $(top)/,,$$(@))\n"
-	$(CC) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-y)/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$@).asl
+	$(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$@).asl
    cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$@)).asl
    mv $$(basename $$@).hex $$(basename $$@).c
-	$(CC) $$(CFLAGS) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$@).c
+	$(CC_ramstage) $$(CFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$@).c
    # keep %.o: %.c rule from catching the temporary .c file after a make clean
    mv $$(basename $$@).c $$(basename $$@).hex
 endef
@@ -168,7 +168,7 @@ cbfs-files-processor-nvramtool= \
 # arg2: binary file name
 cbfs-files-processor-vsa= \
    $(eval $(2): $(1) ; \
-		printf "    CREATE     $(2) (from $(1))\n";  $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(1) $(2).tmp && $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(2).tmp -o $(2))
+		printf "    CREATE     $(2) (from $(1))\n";  $(OBJCOPY_ramstage) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(1) $(2).tmp && $(LD_ramstage) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(2).tmp -o $(2))
#######################################################################
 # Add handler for arbitrary files in CBFS
@@ -211,19 +211,29 @@ ifneq ($(CONFIG_LOCALVERSION),"")
 COREBOOT_EXTRA_VERSION := -$(call strip_quotes,$(CONFIG_LOCALVERSION))
 endif
-INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include
+INCLUDES := -Isrc -Isrc/include -I$(obj)
 INCLUDES += -Isrc/device/oprom/include
 # abspath is a workaround for romcc
 INCLUDES += -include $(src)/include/kconfig.h
-CFLAGS = $(INCLUDES) -Os -pipe -g -nostdinc
-CFLAGS += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes
-CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs
-CFLAGS += -Wstrict-aliasing -Wshadow
+INCLUDES_bootblock := -Isrc/arch/$(ARCHDIR-$(ARCH-BOOTBLOCK-y))/include
+INCLUDES_romstage := -Isrc/arch/$(ARCHDIR-$(ARCH-ROMSTAGE-y))/include
+INCLUDES_ramstage := -Isrc/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include
+INCLUDES_armv7 := -Isrc/arch/$(ARCHDIR-armv7)/include
+INCLUDES_i386 := -Isrc/arch/$(ARCHDIR-i386)/include
+
+CFLAGS_common = $(INCLUDES) -Os -pipe -g -nostdinc
+CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes
+CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs
+CFLAGS_common += -Wstrict-aliasing -Wshadow
 ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y)
-CFLAGS += -Werror
+CFLAGS_common += -Werror
 endif
-CFLAGS += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer
+CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer
+
+CFLAGS_bootblock = $(CFLAGS_common) $(INCLUDES_bootblock)
+CFLAGS_romstage = $(CFLAGS_common) $(INCLUDES_romstage)
+CFLAGS_ramstage = $(CFLAGS_common) $(INCLUDES_ramstage)
additional-dirs := $(objutil)/cbfstool $(objutil)/romcc $(objutil)/ifdtool \
    	   $(objutil)/ifdfake $(objutil)/options
@@ -245,9 +255,6 @@ $(obj)/build.h: .xcompile
    printf "#define COREBOOT_BUILD_WEEKDAY_BCD 0x`LANG= date +"%w"`\n" >> $(obj)/build.ht
    printf "#define COREBOOT_DMI_DATE "`LANG= date +"%m/%d/%Y"`"\n" >> $(obj)/build.ht
    printf "\n" >> $(obj)/build.ht
-	printf "#define COREBOOT_COMPILER "$(shell LANG= $(CC) --version | head -n1)"\n" >> $(obj)/build.ht
-	printf "#define COREBOOT_ASSEMBLER "$(shell LANG= $(AS) --version | head -n1)"\n" >> $(obj)/build.ht
-	printf "#define COREBOOT_LINKER "$(shell LANG= $(LD) --version | head -n1)"\n" >> $(obj)/build.ht
    printf "#define COREBOOT_COMPILE_TIME "`LANG= date +%T`"\n" >> $(obj)/build.ht
    printf "#define COREBOOT_COMPILE_BY "$(subst ,@,$(shell PATH=$$PATH:/usr/ucb whoami))"\n" >> $(obj)/build.ht
    printf "#define COREBOOT_COMPILE_HOST "$(shell hostname -s 2>/dev/null || hostname 2>/dev/null)"\n" >> $(obj)/build.ht
@@ -315,15 +322,15 @@ $(objutil)/%.o: $(objutil)/%.c
$(obj)/%.ramstage.o $(abspath $(obj))/%.ramstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H)
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD $(CFLAGS) -c -o $@ $<
+	$(CC_ramstage) -MMD $(CFLAGS_ramstage) -c -o $@ $<
$(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H)
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD -D__PRE_RAM__ $(CFLAGS) -c -o $@ $<
+	$(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) -c -o $@ $<
$(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H)
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD $(bootblock-c-ccopts) $(CFLAGS) -c -o $@ $<
+	$(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) -c -o $@ $<
#######################################################################
 # Clean up rules
@@ -339,7 +346,7 @@ clean-for-update-target:
    rm -f $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
    rm -f $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.* $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.*
    rm -f $(obj)/cpu/x86/smm/smm_bin.c $(obj)/cpu/x86/smm/smm.* $(obj)/cpu/x86/smm/smm
-	$(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean OUT=$(abspath $(obj)) HOSTCC="$(HOSTCC)" CC="$(CC)" LD="$(LD)"
+	$(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean OUT=$(abspath $(obj)) HOSTCC="$(HOSTCC)" CC="$(CC_i386)" LD="$(LD_i386)"
clean-target:
    rm -f $(obj)/coreboot*
@@ -412,16 +419,27 @@ tools: $(objutil)/kconfig/conf $(objutil)/cbfstool/cbfstool $(objutil)/cbfstool/
 # Common recipes for all stages
 ###########################################################################
+# find-substr is required for stages like romstage_null and romstage_xip to
+# eliminate the _* part of the string
+find-substr = $(word 1,$(subst _, ,$(1)))
+
+# find-class is used to identify the class from the name of the stage
+# romstage.x will return romstage, romstage.x.y will remove .x.y and return romstage.
+# Hence the recursion
+find-class = $(if $(filter $(1),$(basename $(1))),$(if $(CC_$(1)), $(1), $(call find-substr,$(1))),$(call find-class,$(basename $(1))))
+
 $(objcbfs)/%.bin: $(objcbfs)/%.elf
+	$(eval class := $(call find-class,$(@F)))
    @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	$(OBJCOPY) -O binary $< $@
+	$(OBJCOPY_$(class)) -O binary $< $@
$(objcbfs)/%.elf: $(objcbfs)/%.debug
+	$(eval class := $(call find-class,$(@F)))
    @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
    cp $< $@.tmp
-	$(NM) -n $@.tmp | sort > $(basename $@).map
-	$(OBJCOPY) --strip-debug $@.tmp
-	$(OBJCOPY) --add-gnu-debuglink=$< $@.tmp
+	$(NM_$(class)) -n $@.tmp | sort > $(basename $@).map
+	$(OBJCOPY_$(class)) --strip-debug $@.tmp
+	$(OBJCOPY_$(class)) --add-gnu-debuglink=$< $@.tmp
    mv $@.tmp $@
###########################################################################
@@ -550,10 +568,10 @@ cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg
 bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE))
 bootsplash.jpg-type := bootsplash
-ifeq ($(CONFIG_ARCH_ARMV7),y)
+ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y)
 ROMSTAGE_ELF := romstage.elf
 endif
-ifeq ($(CONFIG_ARCH_X86),y)
+ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
 ROMSTAGE_ELF := romstage_xip.elf
 endif
diff --git a/src/Kconfig b/src/Kconfig
index 6356b19..298157f 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -237,6 +237,36 @@ config ARCH_ARMV7
    bool
    default n
+# This option is used to set the architecture of bootblock stage
+config ARCH_BOOTBLOCK_ARMV7
+       bool
+       default n
+       select ARCH_ARMV7
+
+config ARCH_BOOTBLOCK_X86_32
+       bool
+       default n
+       select ARCH_X86
+
+# This option is used to set the architecture of romstage stage
+config ARCH_ROMSTAGE_ARMV7
+       bool
+       default n
+
+config ARCH_ROMSTAGE_X86_32
+       bool
+       default n
+
+# This option is used to set the architecture of ramstage stage
+config ARCH_RAMSTAGE_ARMV7
+       bool
+       default n
+
+config ARCH_RAMSTAGE_X86_32
+       bool
+       default n
+
+
 # Warning: The file is included whether or not the if is here.
 # but the if controls how the evaluation occurs.
 if ARCH_X86
@@ -1119,3 +1149,4 @@ config REG_SCRIPT
    default n
    help
      Internal option that controls whether we compile in register scripts.
+
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index 973d737..bc6d518 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -30,6 +30,7 @@ subdirs-y += lib/
 # ARM specific options
 ###############################################################################
+ifeq ($(CONFIG_ARCH_ARMV7),y)
 CBFSTOOL_PRE1_OPTS = -m armv7 -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET)
 CBFSTOOL_PRE_OPTS = -b 0
@@ -38,20 +39,23 @@ stages_o = $(obj)/arch/armv7/stages.o
$(stages_o): $(stages_c) $(obj)/config.h
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -I. $(INCLUDES) -c -o $@ $< -marm
+	$(CC_armv7) -I. $(INCLUDES) $(INCLUDES_armv7) -c -o $@ $< -marm
-CFLAGS += \
+CFLAGS_common += \
    -ffixed-r8\
    -march=armv7-a\
    -marm\
    -mno-unaligned-access\
    -mthumb\
    -mthumb-interwork
+endif # CONFIG_ARCH_ARMV7
###############################################################################
 # bootblock
 ###############################################################################
+ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7),y)
+
 bootblock-y += cache.c
 bootblock-y += eabi_compat.c
 bootblock-y += memset.S
@@ -79,31 +83,35 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc)
$(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $<  > $(basename $@).disasm
+	$(CC_bootblock) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $<  > $(basename $@).disasm
$(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
+	$(CC_bootblock) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
$(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) $(obj)/config.h
    @printf "    CC      $(subst $(obj)/,,$(@))\n"
-	$(CC) $(bootblock-c-ccopts) $(INCLUDES) -MM \
+	$(CC_bootblock) $(bootblock-c-ccopts) $(INCLUDES) $(INCLUDES_bootblock) -MM \
    	-MT$(objgenerated)/bootblock.inc \
    	$< > $(objgenerated)/bootblock.inc.d
-	$(CC) $(bootblock-c-ccopts) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@
+	$(CC_bootblock) $(bootblock-c-ccopts) -c -S $(CFLAGS_bootblock) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@
$(objcbfs)/bootblock.debug:  $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) $(obj)/config.h
    @printf "    LINK       $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld
+	$(LD_bootblock) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld
 else
-	$(CC) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME) -Wl,--end-group
+	$(CC_bootblock) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group
 endif
+endif # CONFIG_ARCH_BOOTBLOCK_ARMV7
+
 ###############################################################################
 # romstage
 ###############################################################################
+ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y)
+
 romstage-y += cache.c
 romstage-y += div0.c
 romstage-y += eabi_compat.c
@@ -127,9 +135,9 @@ crt0s += $(cpu_incs-y)
 $(objcbfs)/romstage.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage.ld
    @printf "    LINK       $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld
+	$(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld
 else
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group
+	$(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group
 endif
$(objgenerated)/romstage.ld: $$(ldscripts) $(obj)/ldoptions
@@ -144,20 +152,24 @@ $(objgenerated)/crt0.romstage.S: $$(crt0s)
$(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -Wa,-acdlns -c -o $@ $<  > $(basename $@).disasm
+	$(CC_romstage) -Wa,-acdlns -c -o $@ $<  > $(basename $@).disasm
$(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
+	$(CC_romstage) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
    @printf "    CC         romstage.inc\n"
-	$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
+	$(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
+
+endif # CONFIG_ARCH_ROMSTAGE_ARMV7
###############################################################################
 # ramstage
 ###############################################################################
+ifeq ($(CONFIG_ARCH_RAMSTAGE_ARMV7),y)
+
 ramstage-y += exception.c
 ramstage-y += exception_asm.S
 ramstage-y += div0.c
@@ -175,17 +187,17 @@ ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
 $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld
+	$(LD_ramstage) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld
 else
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $<
+	$(CC_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $<
 endif
-$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME)
+$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage)
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group
+	$(LD_ramstage) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) --end-group
 else
-	$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+	$(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group
 endif
ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y)
@@ -211,3 +223,5 @@ endif
 ifeq ($(CONFIG_HAVE_BUS_CONFIG),y)
 ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c
 endif
+
+endif # CONFIG_ARCH_RAMSTAGE_ARMV7
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index eff201a..c423561 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -51,8 +51,10 @@ cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin
 mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE))
 mbi.bin-type := mbi
+ifeq ($(CONFIG_ARCH_X86),y)
 CBFSTOOL_PRE1_OPTS = -m x86 -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) ))
 CBFSTOOL_PRE_OPTS  = -b $(shell cat $(objcbfs)/base_xip.txt)
+endif
################################################################################
 # i386 specific tools
@@ -71,6 +73,8 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l
 # bootblock
 ###############################################################################
+ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y)
+
 bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
 bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds
 bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds
@@ -110,31 +114,36 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc)
    printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@
$(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s
-	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) $(DISASSEMBLY) -c -o $@ $<  > $(basename $@).disasm
+	@printf "    CC        $(subst $(obj)/,,$(@))\n"
+	$(CC_bootblock) $(DISASSEMBLY) -c -o $@ $<  > $(basename $@).disasm
$(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
+	$(CC_bootblock) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@
$(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H)
    @printf "    ROMCC      $(subst $(obj)/,,$(@))\n"
-	$(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \
+	$(CC_bootblock) $(INCLUDES) $(INCLUDES_bootblock) -MM -MT$(objgenerated)/bootblock.inc \
    	$< > $(objgenerated)/bootblock.inc.d
-	$(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $< -o $@
+	$(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@
$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld
    @printf "    LINK       $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m elf_i386 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld
+	$(LD_bootblock) -m elf_i386 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld
 else
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $<
+	$(CC_bootblock) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $<
 endif
+
+endif # CONFIG_ARCH_BOOTBLOCK_X86_32
+
 ###############################################################################
 # romstage
 ###############################################################################
+ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
+
 crt0s = $(src)/arch/x86/init/prologue.inc
 ldscripts =
 ldscripts += $(src)/arch/x86/init/romstage.ld
@@ -166,14 +175,26 @@ else
    ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE
 endif
+$(objcbfs)/romstage_%.bin: $(objcbfs)/romstage_%.elf
+			   @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
+			   $(OBJCOPY_romstage) -O binary $< $@
+
+$(objcbfs)/romstage_%.elf: $(objcbfs)/romstage_%.debug
+			   @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
+			   cp $< $@.tmp
+			   $(NM_romstage) -n $@.tmp | sort > $(basename $@).map
+			   $(OBJCOPY_romstage) --strip-debug $@.tmp
+			   $(OBJCOPY_romstage) --add-gnu-debuglink=$< $@.tmp
+			   mv $@.tmp $@
+
 $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
    printf "    ROMCC      romstage.inc\n"
-	$(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@
+	$(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $(INCLUDES_romstage) $< -o $@
 else
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h
    @printf "    CC         romstage.inc\n"
-	$(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
+	$(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@
$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc
    @printf "    POST       romstage.inc\n"
@@ -189,21 +210,21 @@ romstage-libs ?=
 $(objcbfs)/romstage_null.debug: $$(romstage-objs) $(objgenerated)/romstage_null.ld $$(romstage-libs)
    @printf "    LINK       $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_null.ld
+	$(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) --end-group -T $(objgenerated)/romstage_null.ld
 else
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+	$(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group
 endif
-	$(NM) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \
+	$(NM_romstage) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \
    	echo "Forbidden global variables in romstage:"; \
-		$(NM) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" = y; \
+		$(NM_romstage) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" = y; \
    	else true; fi
$(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld $$(romstage-libs)
    @printf "    LINK       $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_xip.ld
+	$(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) --end-group -T $(objgenerated)/romstage_xip.ld
 else
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+	$(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group
 endif
$(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions
@@ -232,16 +253,20 @@ $(objgenerated)/crt0.romstage.S: $$(crt0s)
$(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) $(DISASSEMBLY) -c -o $@ $<  > $(basename $@).disasm
+	$(CC_romstage) $(DISASSEMBLY) -c -o $@ $<  > $(basename $@).disasm
$(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
+	$(CC_romstage) $(INCLUDES) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@
+
+endif # CONFIG_ARCH_ROMSTAGE_X86_32
###############################################################################
 # ramstage
 ###############################################################################
+ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
+
 ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
 ifeq ($(CONFIG_GENERATE_MP_TABLE),y)
 ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),)
@@ -284,6 +309,7 @@ endif
ramstage-libs ?=
+$(eval $(call create_class_compiler,rmodules,i386))
 ifeq ($(CONFIG_RELOCATABLE_RAMSTAGE),y)
$(eval $(call rmodule_link,$(objcbfs)/ramstage.debug, $(objgenerated)/ramstage.o, $(CONFIG_HEAP_SIZE)))
@@ -297,30 +323,31 @@ else
 $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld
+	$(LD_ramstage) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld
 else
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $<
+	$(CC_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $<
 endif
endif
-$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $$(ramstage-libs)
+$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) $$(ramstage-libs)
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
 ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
-	$(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) --end-group
+	$(LD_ramstage) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME_ramstage) --end-group
 else
-	$(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+	$(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group
 endif
+endif # CONFIG_ARCH_RAMSTAGE_X86_32
################################################################################
seabios:
    $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \
    		HOSTCC="$(HOSTCC)" \
-			CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
-			OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
-			AS="$(AS)" CPP="$(CPP)" \
+			CC="$(CC_i386)" LD="$(LD_i386)" OBJDUMP="$(OBJDUMP_i386)" \
+			OBJCOPY="$(OBJCOPY_i386)" STRIP="$(STRIP_i386)" \
+			AS="$(AS_i386)" CPP="$(CPP)" \
    		CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \
    		CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \
    		CONFIG_SEABIOS_THREAD_OPTIONROMS=$(CONFIG_SEABIOS_THREAD_OPTIONROMS) \
@@ -329,8 +356,8 @@ seabios:
 filo:
    $(MAKE) -C payloads/external/FILO -f Makefile.inc \
    		HOSTCC="$(HOSTCC)" \
-			CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
-			OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
+			CC="$(CC_i386)" LD="$(LD_i386)" OBJDUMP="$(OBJDUMP_i386)" \
+			OBJCOPY="$(OBJCOPY_i386)" STRIP="$(STRIP_i386)" \
    		CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \
    		CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE)
@@ -338,6 +365,6 @@ filo:
 grub2:
    $(MAKE) -C payloads/external/GRUB2 -f Makefile.inc \
    		HOSTCC="$(HOSTCC)" \
-			CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \
-			OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \
+			CC="$(CC_i386)" LD="$(LD_i386)" OBJDUMP="$(OBJDUMP_i386)" \
+			OBJCOPY="$(OBJCOPY_i386)" STRIP="$(STRIP_i386)" \
    		CONFIG_GRUB2_MASTER=$(CONFIG_GRUB2_MASTER)
diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc
index 928fc03..a6f914c 100644
--- a/src/arch/x86/boot/Makefile.inc
+++ b/src/arch/x86/boot/Makefile.inc
@@ -1,6 +1,13 @@
+
+ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
+
 romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c
 romstage-$(CONFIG_BROKEN_CAR_MIGRATE) += cbmem.c
+endif # CONFIG_ARCH_ROMSTAGE_X86_32
+
+ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
+
 ramstage-y += boot.c
 ramstage-y += gdt.c
 ramstage-y += tables.c
@@ -14,3 +21,4 @@ ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S
$(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h
+endif # CONFIG_ARCH_RAMSTAGE_X86_32
\ No newline at end of file
diff --git a/src/arch/x86/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc
index 8b7418b..0a3a575 100644
--- a/src/arch/x86/lib/Makefile.inc
+++ b/src/arch/x86/lib/Makefile.inc
@@ -1,3 +1,16 @@
+
+ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32),y)
+
+romstage-y += cbfs_and_run.c
+romstage-y += memset.c
+romstage-y += memcpy.c
+romstage-y += memmove.c
+romstage-y += rom_media.c
+
+endif # CONFIG_ARCH_ROMSTAGE_X86_32
+
+ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
+
 ramstage-y += c_start.S
 ramstage-y += cpu.c
 ramstage-y += pci_ops_conf1.c
@@ -12,12 +25,6 @@ ramstage-y += rom_media.c
 ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
 ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S
-romstage-y += cbfs_and_run.c
-romstage-y += memset.c
-romstage-y += memcpy.c
-romstage-y += memmove.c
-romstage-y += rom_media.c
-
 smm-y += memset.c
 smm-y += memcpy.c
 smm-y += memmove.c
@@ -26,3 +33,5 @@ smm-y += rom_media.c
 rmodules-y += memset.c
 rmodules-y += memcpy.c
 rmodules-y += memmove.c
+
+endif # CONFIG_ARCH_RAMSTAGE_X86_32
\ No newline at end of file
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
index f206fdc..08d9262 100644
--- a/src/cpu/Makefile.inc
+++ b/src/cpu/Makefile.inc
@@ -12,6 +12,7 @@ subdirs-y += via
 subdirs-y += x86
 subdirs-$(CONFIG_CPU_QEMU_X86) += qemu-x86
+$(eval $(call create_class_compiler,cpu_microcode,i386))
 ################################################################################
 ## Rules for building the microcode blob in CBFS
 ################################################################################
@@ -42,13 +43,13 @@ endif
 # final microcode file.
 $(obj)/cpu_microcode_blob.o: $$(cpu_microcode-objs)
    @printf "    LD         $(subst $(obj)/,,$(@))\n"
-	$(LD) -static --entry=0 $+ -o $@
+	$(LD_ramstage) -static --entry=0 $+ -o $@
# We have a lot of useless data in the large blob, and we are only interested in
 # the data section, so we only copy that part to the final microcode file
 $(obj)/cpu_microcode_blob.bin: $(obj)/cpu_microcode_blob.o
    @printf "  MICROCODE    $(subst $(obj)/,,$(@))\n"
-	$(OBJCOPY) -j .data -O binary $< $@
+	$(OBJCOPY_ramstage) -j .data -O binary $< $@
ifeq ($(cbfs_include_ucode),y)
 # Add CPU microcode to specified rom image $(1)
diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig
index f76a7b6..e12b34d 100644
--- a/src/cpu/allwinner/a10/Kconfig
+++ b/src/cpu/allwinner/a10/Kconfig
@@ -6,7 +6,9 @@ if CPU_ALLWINNER_A10
config CPU_SPECIFIC_OPTIONS
    def_bool y
-	select ARCH_ARMV7
+	select ARCH_BOOTBLOCK_ARMV7
+	select ARCH_ROMSTAGE_ARMV7
+	select ARCH_RAMSTAGE_ARMV7
    select HAVE_MONOTONIC_TIMER
    select HAVE_UART_SPECIAL
    select BOOTBLOCK_CONSOLE
diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig
index fa36f38..26ef514 100644
--- a/src/cpu/amd/agesa/Kconfig
+++ b/src/cpu/amd/agesa/Kconfig
@@ -26,7 +26,9 @@ config CPU_AMD_AGESA
    default y if CPU_AMD_AGESA_FAMILY15_TN
    default y if CPU_AMD_AGESA_FAMILY16_KB
    default n
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select TSC_SYNC_LFENCE
    select UDELAY_LAPIC
    select LAPIC_MONOTONIC_TIMER
diff --git a/src/cpu/amd/geode_gx1/Kconfig b/src/cpu/amd/geode_gx1/Kconfig
index b87e8bc..e1444e1 100644
--- a/src/cpu/amd/geode_gx1/Kconfig
+++ b/src/cpu/amd/geode_gx1/Kconfig
@@ -19,7 +19,9 @@
config CPU_AMD_GEODE_GX1
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
if CPU_AMD_GEODE_GX1
diff --git a/src/cpu/amd/geode_gx2/Kconfig b/src/cpu/amd/geode_gx2/Kconfig
index b96c770..baa1a7c 100644
--- a/src/cpu/amd/geode_gx2/Kconfig
+++ b/src/cpu/amd/geode_gx2/Kconfig
@@ -19,7 +19,9 @@
config CPU_AMD_GEODE_GX2
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
if CPU_AMD_GEODE_GX2
diff --git a/src/cpu/amd/geode_lx/Kconfig b/src/cpu/amd/geode_lx/Kconfig
index 6aceab2..39890c4 100644
--- a/src/cpu/amd/geode_lx/Kconfig
+++ b/src/cpu/amd/geode_lx/Kconfig
@@ -1,6 +1,8 @@
 config CPU_AMD_GEODE_LX
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
if CPU_AMD_GEODE_LX
diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index 30c2486..5e45b0d 100644
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -1,6 +1,8 @@
 config CPU_AMD_MODEL_10XXX
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SSE
    select SSE2
    select MMCONF_SUPPORT_DEFAULT
diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig
index 1a811f4..f577b55 100644
--- a/src/cpu/amd/model_fxx/Kconfig
+++ b/src/cpu/amd/model_fxx/Kconfig
@@ -1,6 +1,8 @@
 config CPU_AMD_MODEL_FXX
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select MMX
    select SSE
    select SSE2
diff --git a/src/cpu/amd/sc520/Kconfig b/src/cpu/amd/sc520/Kconfig
index 46377be..7696b5c 100644
--- a/src/cpu/amd/sc520/Kconfig
+++ b/src/cpu/amd/sc520/Kconfig
@@ -1,3 +1,5 @@
 config CPU_AMD_SC520
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
diff --git a/src/cpu/armltd/cortex-a9/Kconfig b/src/cpu/armltd/cortex-a9/Kconfig
index f46c6ff..1510109 100644
--- a/src/cpu/armltd/cortex-a9/Kconfig
+++ b/src/cpu/armltd/cortex-a9/Kconfig
@@ -1,6 +1,8 @@
 config CPU_ARMLTD_CORTEX_A9
    bool
-	select ARCH_ARMV7
+	select ARCH_BOOTBLOCK_ARMV7
+	select ARCH_ROMSTAGE_ARMV7
+	select ARCH_RAMSTAGE_ARMV7
    select EARLY_CONSOLE
    default n
diff --git a/src/cpu/dmp/vortex86ex/Kconfig b/src/cpu/dmp/vortex86ex/Kconfig
index aea8889..a7253e5 100644
--- a/src/cpu/dmp/vortex86ex/Kconfig
+++ b/src/cpu/dmp/vortex86ex/Kconfig
@@ -19,5 +19,7 @@
config CPU_DMP_VORTEX86EX
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select UDELAY_TSC
diff --git a/src/cpu/intel/ep80579/Kconfig b/src/cpu/intel/ep80579/Kconfig
index fa96f8d..530c48f 100644
--- a/src/cpu/intel/ep80579/Kconfig
+++ b/src/cpu/intel/ep80579/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_EP80579
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SSE
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig
index 22d01e6..3aacaf7 100644
--- a/src/cpu/intel/fsp_model_206ax/Kconfig
+++ b/src/cpu/intel/fsp_model_206ax/Kconfig
@@ -28,7 +28,9 @@ if CPU_INTEL_FSP_MODEL_206AX || CPU_INTEL_FSP_MODEL_306AX
config CPU_SPECIFIC_OPTIONS
    def_bool y
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SSE2
    select UDELAY_LAPIC
diff --git a/src/cpu/intel/fsp_model_206ax/Makefile.inc b/src/cpu/intel/fsp_model_206ax/Makefile.inc
index 1ea9c2a..efd2799 100644
--- a/src/cpu/intel/fsp_model_206ax/Makefile.inc
+++ b/src/cpu/intel/fsp_model_206ax/Makefile.inc
@@ -9,4 +9,7 @@ cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE)  += microcode_blob.c
cpu_incs += $(src)/cpu/intel/fsp_model_206ax/cache_as_ram.inc
-CC := $(CC) -I$(CONFIG_MICROCODE_INCLUDE_PATH)
+CC_bootblock := $(CC_bootblock) -I$(CONFIG_MICROCODE_INCLUDE_PATH)
+CC_romstage := $(CC_romstage) -I$(CONFIG_MICROCODE_INCLUDE_PATH)
+CC_ramstage := $(CC_ramstage) -I$(CONFIG_MICROCODE_INCLUDE_PATH)
+CC_i386 := $(CC_i386) -I$(CONFIG_MICROCODE_INCLUDE_PATH)
diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig
index 97309ae..04c7677 100644
--- a/src/cpu/intel/haswell/Kconfig
+++ b/src/cpu/intel/haswell/Kconfig
@@ -6,7 +6,9 @@ if CPU_INTEL_HASWELL
config CPU_SPECIFIC_OPTIONS
    def_bool y
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select BACKUP_DEFAULT_SMM_REGION
    select SMP
    select SSE2
diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc
index 63c1939..e504a68 100644
--- a/src/cpu/intel/haswell/Makefile.inc
+++ b/src/cpu/intel/haswell/Makefile.inc
@@ -26,14 +26,14 @@ rmodules-y += sipi_vector.S
 rmodules-y += sipi_header.c
$(SIPI_DOTO): $(dir $(SIPI_ELF))sipi_vector.rmodules.o
-	$(CC) $(LDFLAGS) -nostdlib -r -o $@ $^
+	$(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^
$(eval $(call rmodule_link,$(SIPI_ELF), $(SIPI_DOTO), 0))
$(SIPI_BIN): $(SIPI_ELF).rmod
-	$(OBJCOPY) -O binary $< $@
+	$(OBJCOPY_ramstage) -O binary $< $@
$(SIPI_BIN).ramstage.o: $(SIPI_BIN)
    @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@)
+	cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@)
diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig
index 4d6add6..794c205 100644
--- a/src/cpu/intel/model_1067x/Kconfig
+++ b/src/cpu/intel/model_1067x/Kconfig
@@ -1,6 +1,8 @@
 config CPU_INTEL_MODEL_1067X
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SSE2
    select TSC_SYNC_MFENCE
diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig
index ea6f5ca..456c99d 100644
--- a/src/cpu/intel/model_106cx/Kconfig
+++ b/src/cpu/intel/model_106cx/Kconfig
@@ -1,6 +1,8 @@
 config CPU_INTEL_MODEL_106CX
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SSE2
    select UDELAY_LAPIC
diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig
index 4c7456d..f59845e 100644
--- a/src/cpu/intel/model_2065x/Kconfig
+++ b/src/cpu/intel/model_2065x/Kconfig
@@ -5,7 +5,9 @@ if CPU_INTEL_MODEL_2065X
config CPU_SPECIFIC_OPTIONS
    def_bool y
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SSE
    select SSE2
diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig
index 64b2a0a..eb45bf8 100644
--- a/src/cpu/intel/model_206ax/Kconfig
+++ b/src/cpu/intel/model_206ax/Kconfig
@@ -8,7 +8,9 @@ if CPU_INTEL_MODEL_206AX || CPU_INTEL_MODEL_306AX
config CPU_SPECIFIC_OPTIONS
    def_bool y
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SSE2
    select UDELAY_LAPIC
diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig
index b3fa7bd..7af4ec9 100644
--- a/src/cpu/intel/model_65x/Kconfig
+++ b/src/cpu/intel/model_65x/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_MODEL_65X
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig
index 7558bc2..1fd514b 100644
--- a/src/cpu/intel/model_67x/Kconfig
+++ b/src/cpu/intel/model_67x/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_MODEL_67X
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig
index 670163a..8a8de0d 100644
--- a/src/cpu/intel/model_68x/Kconfig
+++ b/src/cpu/intel/model_68x/Kconfig
@@ -20,6 +20,8 @@
config CPU_INTEL_MODEL_68X
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_69x/Kconfig b/src/cpu/intel/model_69x/Kconfig
index e4a0e6c..e1cd658 100644
--- a/src/cpu/intel/model_69x/Kconfig
+++ b/src/cpu/intel/model_69x/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_MODEL_69X
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig
index 4dc6fe6..46fbf1f 100644
--- a/src/cpu/intel/model_6bx/Kconfig
+++ b/src/cpu/intel/model_6bx/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_MODEL_6BX
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_6dx/Kconfig b/src/cpu/intel/model_6dx/Kconfig
index e6d5f1e..b1a4c38 100644
--- a/src/cpu/intel/model_6dx/Kconfig
+++ b/src/cpu/intel/model_6dx/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_MODEL_6DX
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig
index eee864d..5c1b8de 100644
--- a/src/cpu/intel/model_6ex/Kconfig
+++ b/src/cpu/intel/model_6ex/Kconfig
@@ -1,6 +1,8 @@
 config CPU_INTEL_MODEL_6EX
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SSE2
    select UDELAY_LAPIC
diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig
index b8de303..0250397 100644
--- a/src/cpu/intel/model_6fx/Kconfig
+++ b/src/cpu/intel/model_6fx/Kconfig
@@ -1,6 +1,8 @@
 config CPU_INTEL_MODEL_6FX
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SSE2
    select UDELAY_LAPIC
diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig
index 49cfe2d..546ac91 100644
--- a/src/cpu/intel/model_6xx/Kconfig
+++ b/src/cpu/intel/model_6xx/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_MODEL_6XX
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_f0x/Kconfig b/src/cpu/intel/model_f0x/Kconfig
index 2ed68d1..bae4b0e 100644
--- a/src/cpu/intel/model_f0x/Kconfig
+++ b/src/cpu/intel/model_f0x/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_MODEL_F0X
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_f1x/Kconfig b/src/cpu/intel/model_f1x/Kconfig
index 3bdb7f6..85bf5ad 100644
--- a/src/cpu/intel/model_f1x/Kconfig
+++ b/src/cpu/intel/model_f1x/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_MODEL_F1X
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig
index 62393a8..2871231 100644
--- a/src/cpu/intel/model_f2x/Kconfig
+++ b/src/cpu/intel/model_f2x/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_MODEL_F2X
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig
index 5c9d0a3..cd3aa5b 100644
--- a/src/cpu/intel/model_f3x/Kconfig
+++ b/src/cpu/intel/model_f3x/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_MODEL_F3X
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig
index 849dcd0..cc23f04 100644
--- a/src/cpu/intel/model_f4x/Kconfig
+++ b/src/cpu/intel/model_f4x/Kconfig
@@ -1,5 +1,7 @@
 config CPU_INTEL_MODEL_F4X
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select SMP
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
index e54e4db..ada6e23 100644
--- a/src/cpu/qemu-x86/Kconfig
+++ b/src/cpu/qemu-x86/Kconfig
@@ -19,4 +19,6 @@
config CPU_QEMU_X86
    bool
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig
index b8042e3..8cf23ec 100644
--- a/src/cpu/samsung/exynos5250/Kconfig
+++ b/src/cpu/samsung/exynos5250/Kconfig
@@ -1,5 +1,7 @@
 config CPU_SAMSUNG_EXYNOS5250
-	select ARCH_ARMV7
+	select ARCH_BOOTBLOCK_ARMV7
+	select ARCH_ROMSTAGE_ARMV7
+	select ARCH_RAMSTAGE_ARMV7
    select HAVE_MONOTONIC_TIMER
    select HAVE_UART_SPECIAL
    select EARLY_CONSOLE
diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig
index 6207adf..4412828 100644
--- a/src/cpu/samsung/exynos5420/Kconfig
+++ b/src/cpu/samsung/exynos5420/Kconfig
@@ -1,5 +1,7 @@
 config CPU_SAMSUNG_EXYNOS5420
-	select ARCH_ARMV7
+	select ARCH_BOOTBLOCK_ARMV7
+	select ARCH_ROMSTAGE_ARMV7
+	select ARCH_RAMSTAGE_ARMV7
    select HAVE_MONOTONIC_TIMER
    select HAVE_UART_SPECIAL
    select EARLY_CONSOLE
diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig
index 22a02ad..941b157 100644
--- a/src/cpu/ti/am335x/Kconfig
+++ b/src/cpu/ti/am335x/Kconfig
@@ -1,5 +1,7 @@
 config CPU_TI_AM335X
-	select ARCH_ARMV7
+	select ARCH_BOOTBLOCK_ARMV7
+	select ARCH_ROMSTAGE_ARMV7
+	select ARCH_RAMSTAGE_ARMV7
    select HAVE_MONOTONIC_TIMER
    select HAVE_UART_SPECIAL
    select BOOTBLOCK_CONSOLE
diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc
index 5b10bd8..a38eac9 100644
--- a/src/cpu/ti/am335x/Makefile.inc
+++ b/src/cpu/ti/am335x/Makefile.inc
@@ -16,6 +16,7 @@ ramstage-y	+= uart.c
 endif
$(call add-class,omap-header)
+$(eval $(call create_class_compiler,omap-header,armv7))
real-target: $(obj)/MLO
@@ -28,14 +29,14 @@ get_header_size= \
$(obj)/omap-header.bin: $$(omap-header-objs) $$(header_ld) $(obj)/coreboot.rom
    @printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -nostdlib -nostartfiles -static -include $(obj)/config.h \
+	$(CC_armv7) -nostdlib -nostartfiles -static -include $(obj)/config.h \
    	-Wl,--defsym,header_load_size=$(strip \
    		$(call get_header_size,$(obj)/coreboot.rom, \
    			$(CONFIG_CBFS_PREFIX)/romstage \
    		) \
    	) \
    	-o $@.tmp $< -T $(header_ld)
-	$(OBJCOPY) --only-section=".header" -O binary $@.tmp $@
+	$(OBJCOPY_armv7) --only-section=".header" -O binary $@.tmp $@
$(obj)/MLO: $(obj)/coreboot.rom $(obj)/omap-header.bin
    @printf "    HEADER     $(subst $(obj)/,,$(@))\n"
diff --git a/src/cpu/via/c3/Kconfig b/src/cpu/via/c3/Kconfig
index 566f07c..2e4d177 100644
--- a/src/cpu/via/c3/Kconfig
+++ b/src/cpu/via/c3/Kconfig
@@ -5,7 +5,9 @@ if CPU_VIA_C3
config CPU_SPECIFIC_OPTIONS
    def_bool y
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select UDELAY_TSC
    select MMX
    select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS
diff --git a/src/cpu/via/c7/Kconfig b/src/cpu/via/c7/Kconfig
index d5f1a41..01fd408 100644
--- a/src/cpu/via/c7/Kconfig
+++ b/src/cpu/via/c7/Kconfig
@@ -5,7 +5,9 @@ if CPU_VIA_C7
config CPU_SPECIFIC_OPTIONS
    def_bool y
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select UDELAY_TSC
    select MMX
    select SSE2
diff --git a/src/cpu/via/nano/Kconfig b/src/cpu/via/nano/Kconfig
index 0f4f994..e819585 100644
--- a/src/cpu/via/nano/Kconfig
+++ b/src/cpu/via/nano/Kconfig
@@ -24,7 +24,9 @@ if CPU_VIA_NANO
config CPU_SPECIFIC_OPTIONS
    def_bool y
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select UDELAY_TSC
    select MMX
    select SSE2
diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc
index 514d96c..bc6a116 100644
--- a/src/cpu/x86/Makefile.inc
+++ b/src/cpu/x86/Makefile.inc
@@ -16,13 +16,13 @@ endif
 rmodules-$(CONFIG_PARALLEL_MP) += sipi_vector.S
$(SIPI_DOTO): $(dir $(SIPI_ELF))sipi_vector.rmodules.o
-	$(CC) $(LDFLAGS) -nostdlib -r -o $@ $^
+	$(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^
$(eval $(call rmodule_link,$(SIPI_ELF), $(SIPI_ELF:.elf=.o), 0))
$(SIPI_BIN): $(SIPI_RMOD)
-	$(OBJCOPY) -O binary $< $@
+	$(OBJCOPY_ramstage) -O binary $< $@
$(SIPI_BIN).ramstage.o: $(SIPI_BIN)
    @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@)
+	cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@)
diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc
index 9720630..045e28b 100644
--- a/src/cpu/x86/smm/Makefile.inc
+++ b/src/cpu/x86/smm/Makefile.inc
@@ -19,7 +19,11 @@
ramstage-$(CONFIG_BACKUP_DEFAULT_SMM_REGION) += backup_default_smm.c
+$(eval $(call create_class_compiler,smm,i386))
+$(eval $(call create_class_compiler,smmstub,i386))
+
 ifeq ($(CONFIG_SMM_MODULES),y)
+
 smmstub-y += smm_stub.S
smm-y += smm_module_handler.c
@@ -32,32 +36,32 @@ ramstage-srcs += $(obj)/cpu/x86/smm/smmstub
 # SMM Stub Module. The stub is used as a trampoline for relocation and normal
 # SMM handling.
 $(obj)/cpu/x86/smm/smmstub.o: $$(smmstub-objs)
-	$(CC) $(LDFLAGS) -nostdlib -r -o $@ $^
+	$(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^
# Link the SMM stub module with a 0-byte heap.
 $(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smmstub.elf, $(obj)/cpu/x86/smm/smmstub.o, 0))
$(obj)/cpu/x86/smm/smmstub: $(obj)/cpu/x86/smm/smmstub.elf.rmod
-	$(OBJCOPY) -O binary $< $@
+	$(OBJCOPY_ramstage) -O binary $< $@
$(obj)/cpu/x86/smm/smmstub.ramstage.o: $(obj)/cpu/x86/smm/smmstub
    @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@)
+	cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@)
# C-based SMM handler.
-$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME)
-	$(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME_ramstage)
+	$(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group
$(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smm.elf, $(obj)/cpu/x86/smm/smm.o, $(CONFIG_SMM_MODULE_HEAP_SIZE)))
$(obj)/cpu/x86/smm/smm: $(obj)/cpu/x86/smm/smm.elf.rmod
-	$(OBJCOPY) -O binary $< $@
+	$(OBJCOPY_ramstage) -O binary $< $@
$(obj)/cpu/x86/smm/smm.ramstage.o: $(obj)/cpu/x86/smm/smm
    @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@)
+	cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@)
else # CONFIG_SMM_MODULES
@@ -79,18 +83,18 @@ endif
smm-y += smihandler.c
-$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME)
-	$(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group
+$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME_ramstage)
+	$(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group
$(obj)/cpu/x86/smm/smm_wrap: $(obj)/cpu/x86/smm/smm.o $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/ldoptions
-	$(CC) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o
-	$(NM) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map
-	$(OBJCOPY) -O binary $(obj)/cpu/x86/smm/smm.elf $(obj)/cpu/x86/smm/smm
+	$(CC_ramstage) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o
+	$(NM_ramstage) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map
+	$(OBJCOPY_ramstage) -O binary $(obj)/cpu/x86/smm/smm.elf $(obj)/cpu/x86/smm/smm
# change to the target path because objcopy will use the path name in its
 # ELF symbol names.
 $(obj)/cpu/x86/smm/smm_wrap.ramstage.o: $(obj)/cpu/x86/smm/smm_wrap
    @printf "    OBJCOPY    $(subst $(obj)/,,$(@))\n"
-	cd $(obj)/cpu/x86/smm; $(OBJCOPY) -I binary smm -O elf32-i386 -B i386 smm_wrap.ramstage.o
+	cd $(obj)/cpu/x86/smm; $(OBJCOPY_ramstage) -I binary smm -O elf32-i386 -B i386 smm_wrap.ramstage.o
endif # CONFIG_SMM_MODULES
diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc
index bd41b12..7ef7d2f 100644
--- a/src/device/Makefile.inc
+++ b/src/device/Makefile.inc
@@ -9,7 +9,7 @@ ramstage-$(CONFIG_PCIEXP_PLUGIN_SUPPORT) += pciexp_device.c
 ramstage-$(CONFIG_AGP_PLUGIN_SUPPORT) += agp_device.c
 ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += cardbus_device.c
 ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += azalia_device.c
-ramstage-$(CONFIG_ARCH_X86) += pnp_device.c
+ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += pnp_device.c
 ramstage-$(CONFIG_PCI) += pci_ops.c
 ramstage-$(CONFIG_PCI) += pci_early.c
 ramstage-y += smbus_ops.c
diff --git a/src/include/version.h b/src/include/version.h
index af838b6..7290261 100644
--- a/src/include/version.h
+++ b/src/include/version.h
@@ -15,8 +15,5 @@ extern const char coreboot_compile_time[];
 extern const char coreboot_compile_by[];
 extern const char coreboot_compile_host[];
 extern const char coreboot_compile_domain[];
-extern const char coreboot_compiler[];
-extern const char coreboot_linker[];
-extern const char coreboot_assembler[];
#endif /* VERSION_H */
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index f8cf3b1..014f8a6 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -56,7 +56,7 @@ romstage-y += compute_ip_checksum.c
 ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y)
 romstage-y += memmove.c
 endif
-romstage-$(CONFIG_ARCH_X86) += gcc.c
+romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += gcc.c
ramstage-y += hardwaremain.c
 ramstage-y += selfboot.c
@@ -83,7 +83,7 @@ ramstage-y += cbfs.c
 ramstage-y += lzma.c
 #ramstage-y += lzmadecode.c
 ramstage-y += stack.c
-ramstage-$(CONFIG_ARCH_X86) += gcc.c
+ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += gcc.c
 ramstage-y += clog2.c
 romstage-y += clog2.c
 ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
@@ -143,8 +143,8 @@ RMODULE_LDFLAGS  := -nostartfiles -Wl,--emit-relocs -Wl,-z,defs -Wl,-Bsymbolic -
 # rmdoule is named $(1).rmod
 define rmodule_link
 $(strip $(1)): $(strip $(2)) $$(RMODULE_LDSCRIPT) $$(obj)/ldoptions $$(RMODTOOL)
-	$$(CC) $$(CFLAGS) $$(RMODULE_LDFLAGS) -Wl,--defsym=__heap_size=$(strip $(3)) -o $$@ -Wl,--start-group $(strip $(2)) $$(LIBGCC_FILE_NAME) -Wl,--end-group
-	$$(NM) -n $$@ > $$(basename $$@).map
+	$$(CC_ramstage) $$(CFLAGS_ramstage) $$(RMODULE_LDFLAGS) -Wl,--defsym=__heap_size=$(strip $(3)) -o $$@ -Wl,--start-group $(strip $(2)) $$(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group
+	$$(NM_ramstage) -n $$@ > $$(basename $$@).map
$(strip $(1)).rmod: $(strip $(1))
    $$(RMODTOOL) -i $$^ -o $$@
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index 8e7f85d..267dfe5 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -273,9 +273,6 @@ static void lb_strings(struct lb_header *header)
    	{ LB_TAG_COMPILE_BY,     coreboot_compile_by,     },
    	{ LB_TAG_COMPILE_HOST,   coreboot_compile_host,   },
    	{ LB_TAG_COMPILE_DOMAIN, coreboot_compile_domain, },
-		{ LB_TAG_COMPILER,       coreboot_compiler,       },
-		{ LB_TAG_LINKER,         coreboot_linker,         },
-		{ LB_TAG_ASSEMBLER,      coreboot_assembler,      },
    };
    unsigned int i;
    for(i = 0; i < ARRAY_SIZE(strings); i++) {
diff --git a/src/lib/version.c b/src/lib/version.c
index 4ec1eb6..00429bf 100644
--- a/src/lib/version.c
+++ b/src/lib/version.c
@@ -25,16 +25,6 @@
 #error  COREBOOT_COMPILE_HOST not defined
 #endif
-#ifndef COREBOOT_COMPILER
-#error  COREBOOT_COMPILER not defined
-#endif
-#ifndef COREBOOT_LINKER
-#error  COREBOOT_LINKER not defined
-#endif
-#ifndef COREBOOT_ASSEMBLER
-#error  COREBOOT_ASSEMBLER not defined
-#endif
-
 #ifndef  COREBOOT_EXTRA_VERSION
 #define COREBOOT_EXTRA_VERSION ""
 #endif
@@ -50,7 +40,4 @@ const char coreboot_compile_time[]   = COREBOOT_COMPILE_TIME;
 const char coreboot_compile_by[]     = COREBOOT_COMPILE_BY;
 const char coreboot_compile_host[]   = COREBOOT_COMPILE_HOST;
 const char coreboot_compile_domain[] = COREBOOT_COMPILE_DOMAIN;
-const char coreboot_compiler[]       = COREBOOT_COMPILER;
-const char coreboot_linker[]         = COREBOOT_LINKER;
-const char coreboot_assembler[]      = COREBOOT_ASSEMBLER;
diff --git a/src/mainboard/advansus/a785e-i/Makefile.inc b/src/mainboard/advansus/a785e-i/Makefile.inc
index 924f9d6..0bbc26f 100644
--- a/src/mainboard/advansus/a785e-i/Makefile.inc
+++ b/src/mainboard/advansus/a785e-i/Makefile.inc
@@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y)
          -I$(AGESA_ROOT)/Proc/CPU/ \
          -I$(AGESA_ROOT)/Proc/CPU/Family
- CFLAGS += $(AGESA_INC)
+ CFLAGS_common += $(AGESA_INC)
 endif
diff --git a/src/mainboard/asus/m5a88-v/Makefile.inc b/src/mainboard/asus/m5a88-v/Makefile.inc
index 924f9d6..0bbc26f 100644
--- a/src/mainboard/asus/m5a88-v/Makefile.inc
+++ b/src/mainboard/asus/m5a88-v/Makefile.inc
@@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y)
          -I$(AGESA_ROOT)/Proc/CPU/ \
          -I$(AGESA_ROOT)/Proc/CPU/Family
- CFLAGS += $(AGESA_INC)
+ CFLAGS_common += $(AGESA_INC)
 endif
diff --git a/src/mainboard/avalue/eax-785e/Makefile.inc b/src/mainboard/avalue/eax-785e/Makefile.inc
index 924f9d6..0bbc26f 100644
--- a/src/mainboard/avalue/eax-785e/Makefile.inc
+++ b/src/mainboard/avalue/eax-785e/Makefile.inc
@@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y)
          -I$(AGESA_ROOT)/Proc/CPU/ \
          -I$(AGESA_ROOT)/Proc/CPU/Family
- CFLAGS += $(AGESA_INC)
+ CFLAGS_common += $(AGESA_INC)
 endif
diff --git a/src/mainboard/bifferos/bifferboard/Kconfig b/src/mainboard/bifferos/bifferboard/Kconfig
index 4ee9958..9d00f5e 100644
--- a/src/mainboard/bifferos/bifferboard/Kconfig
+++ b/src/mainboard/bifferos/bifferboard/Kconfig
@@ -2,7 +2,9 @@ if BOARD_BIFFEROS_BIFFERBOARD
config BOARD_SPECIFIC_OPTIONS
    def_bool y
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select ROMCC
    select BOARD_ROMSIZE_KB_128
    select NORTHBRIDGE_RDC_R8610
diff --git a/src/mainboard/packardbell/ms2290/Kconfig b/src/mainboard/packardbell/ms2290/Kconfig
index 114c1a8..5b71ad8 100644
--- a/src/mainboard/packardbell/ms2290/Kconfig
+++ b/src/mainboard/packardbell/ms2290/Kconfig
@@ -2,7 +2,9 @@ if BOARD_PACKARDBELL_MS2290
config BOARD_SPECIFIC_OPTIONS # dummy
    def_bool y
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select NORTHBRIDGE_INTEL_NEHALEM
    select SOUTHBRIDGE_INTEL_IBEXPEAK
    select HAVE_OPTION_TABLE
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 1b3ee05..e0e6c2a 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -8,7 +8,9 @@ if SOC_INTEL_BAYTRAIL
config CPU_SPECIFIC_OPTIONS
    def_bool y
-	select ARCH_X86
+	select ARCH_BOOTBLOCK_X86_32
+	select ARCH_ROMSTAGE_X86_32
+	select ARCH_RAMSTAGE_X86_32
    select CACHE_MRC_SETTINGS
    select CAR_MIGRATION
    select COLLECT_TIMESTAMPS
diff --git a/src/superio/Makefile.inc b/src/superio/Makefile.inc
index e34fa89..516a232 100644
--- a/src/superio/Makefile.inc
+++ b/src/superio/Makefile.inc
@@ -28,4 +28,4 @@ subdirs-y += smsc
 subdirs-y += via
 subdirs-y += winbond
-ramstage-$(CONFIG_ARCH_X86) += common/conf_mode.c
+ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += common/conf_mode.c
diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc
index 203efab..7ae8399 100644
--- a/src/vendorcode/amd/agesa/f10/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f10/Makefile.inc
@@ -48,5 +48,8 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
 export AGESA_ROOT
 export AGESA_INC
 export AGESA_CFLAGS
-CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_i386 := $(CC_i386) $(AGESA_INC) $(AGESA_CFLAGS)
diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc
index e1bafbe..d644843 100644
--- a/src/vendorcode/amd/agesa/f12/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f12/Makefile.inc
@@ -86,5 +86,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
 export AGESA_ROOT := $(AGESA_ROOT)
 export AGESA_INC  := $(AGESA_INC)
 export AGESA_CFLAGS  := $(AGESA_CFLAGS)
-CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS)
-#######################################################################
\ No newline at end of file
+CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_i386 := $(CC_i386) $(AGESA_INC) $(AGESA_CFLAGS)
+#######################################################################
diff --git a/src/vendorcode/amd/agesa/f14/Makefile.inc b/src/vendorcode/amd/agesa/f14/Makefile.inc
index f457277..c2916a7 100644
--- a/src/vendorcode/amd/agesa/f14/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f14/Makefile.inc
@@ -67,11 +67,16 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
 export AGESA_ROOT := $(AGESA_ROOT)
 export AGESA_INC  := $(AGESA_INC)
 export AGESA_CFLAGS  := $(AGESA_CFLAGS)
-CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_i386 := $(CC_i386) $(AGESA_INC) $(AGESA_CFLAGS)
 #######################################################################
classes-y += libagesa
+$(eval $(call create_class_compiler,libagesa,i386))
+
 libagesa-y  = Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c
 libagesa-y += Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c
 libagesa-y += Proc/GNB/Nb/Family/0x14/F14NbLclkDpm.c
diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc
index 2a7acce..47312db 100644
--- a/src/vendorcode/amd/agesa/f15/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15/Makefile.inc
@@ -529,5 +529,7 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing
 export AGESA_ROOT
 export AGESA_INC
 export AGESA_CFLAGS
-CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS)
-
+CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_i386 := $(CC_i386) $(AGESA_INC) $(AGESA_CFLAGS)
diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
index 00ace78..04ec40b 100644
--- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc
@@ -91,11 +91,16 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
 export AGESA_ROOT := $(AGESA_ROOT)
 export AGESA_INC  := $(AGESA_INC)
 export AGESA_CFLAGS  := $(AGESA_CFLAGS)
-CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_i386 := $(CC_i386) $(AGESA_INC) $(AGESA_CFLAGS)
 #######################################################################
classes-y += libagesa
+$(eval $(call create_class_compiler,libagesa,i386))
+
 libagesa-y += Legacy/Proc/Dispatcher.c
 libagesa-y += Legacy/Proc/agesaCallouts.c
 libagesa-y += Legacy/Proc/hobTransfer.c
diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc
index 0e68895..ad992b4 100644
--- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc
+++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc
@@ -98,5 +98,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st
 export AGESA_ROOT := $(AGESA_ROOT)
 export AGESA_INC  := $(AGESA_INC)
 export AGESA_CFLAGS  := $(AGESA_CFLAGS)
-CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
+CC_i386 := $(CC_i386) $(AGESA_INC) $(AGESA_CFLAGS)
 #######################################################################
diff --git a/src/vendorcode/amd/cimx/rd890/Makefile.inc b/src/vendorcode/amd/cimx/rd890/Makefile.inc
index feeb2cd..51165b5 100644
--- a/src/vendorcode/amd/cimx/rd890/Makefile.inc
+++ b/src/vendorcode/amd/cimx/rd890/Makefile.inc
@@ -113,7 +113,11 @@ NB_CIMX_CFLAGS =
 export CIMX_ROOT
 export NB_CIMX_INC
 export NB_CIMX_CFLAGS
-CC := $(CC) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC)
+
+CC_bootblock := $(CC_bootblock) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC)
+CC_romstage := $(CC_romstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC)
+CC_ramstage := $(CC_ramstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC)
+CC_i386 := $(CC_i386) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC)
#######################################################################
diff --git a/src/vendorcode/amd/cimx/sb700/Makefile.inc b/src/vendorcode/amd/cimx/sb700/Makefile.inc
index 10d03e6..e88253e 100644
--- a/src/vendorcode/amd/cimx/sb700/Makefile.inc
+++ b/src/vendorcode/amd/cimx/sb700/Makefile.inc
@@ -72,7 +72,10 @@ SB_CIMX_CFLAGS =
 export CIMX_ROOT
 export SB_CIMX_INC
 export SB_CIMX_CFLAGS
-CC := $(CC) $(SB_CIMX_CFLAGS) $(SB_CIMX_INC)
+CC_bootblock := $(CC_bootblock) $(SB_CIMX_INC)
+CC_romstage := $(CC_romstage) $(SB_CIMX_INC)
+CC_ramstage := $(CC_ramstage) $(SB_CIMX_INC)
+CC_i386 := $(CC_i386) $(SB_CIMX_INC)
#######################################################################
diff --git a/src/vendorcode/amd/cimx/sb800/Makefile.inc b/src/vendorcode/amd/cimx/sb800/Makefile.inc
index 3fb1d54..3356fa2 100644
--- a/src/vendorcode/amd/cimx/sb800/Makefile.inc
+++ b/src/vendorcode/amd/cimx/sb800/Makefile.inc
@@ -79,7 +79,10 @@ CIMX_CFLAGS =
 export CIMX_ROOT
 export CIMX_INC
 export CIMX_CFLAGS
-CC := $(CC) $(CIMX_INC)
+CC_bootblock := $(CC_bootblock) $(CIMX_INC)
+CC_romstage := $(CC_romstage) $(CIMX_INC)
+CC_ramstage := $(CC_ramstage) $(CIMX_INC)
+CC_i386 := $(CC_i386) $(CIMX_INC)
#######################################################################
diff --git a/src/vendorcode/amd/cimx/sb900/Makefile.inc b/src/vendorcode/amd/cimx/sb900/Makefile.inc
index 4a3417f..8987ad5 100644
--- a/src/vendorcode/amd/cimx/sb900/Makefile.inc
+++ b/src/vendorcode/amd/cimx/sb900/Makefile.inc
@@ -82,7 +82,10 @@ CIMX_CFLAGS =
 export CIMX_ROOT
 export CIMX_INC
 export CIMX_CFLAGS
-CC := $(CC) $(CIMX_INC)
+CC_bootblock := $(CC_bootblock) $(CIMX_INC)
+CC_romstage := $(CC_romstage) $(CIMX_INC)
+CC_ramstage := $(CC_ramstage) $(CIMX_INC)
+CC_i386 := $(CC_i386) $(CIMX_INC)
#######################################################################
diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc
index 21e1750..129cdb2 100644
--- a/src/vendorcode/google/chromeos/Makefile.inc
+++ b/src/vendorcode/google/chromeos/Makefile.inc
@@ -19,9 +19,9 @@
romstage-y += chromeos.c
 ramstage-y += chromeos.c
-romstage-$(CONFIG_ARCH_X86) += vbnv.c
-ramstage-$(CONFIG_ARCH_X86) += vbnv.c
-romstage-$(CONFIG_ARCH_X86) += vboot.c
+romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += vbnv.c
+ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += vbnv.c
+romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += vboot.c
 ramstage-y += gnvs.c
 romstage-y += fmap.c
 ramstage-y += fmap.c
@@ -33,9 +33,9 @@ romstage-srcs += src/mainboard/$(MAINBOARDDIR)/chromeos.c
 endif
ifeq ($(MOCK_TPM),1)
-CFLAGS += -DMOCK_TPM=1
+CFLAGS_common += -DMOCK_TPM=1
 else
-CFLAGS += -DMOCK_TPM=0
+CFLAGS_common += -DMOCK_TPM=0
 endif
ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y)
@@ -43,7 +43,12 @@ romstage-y += vboot_loader.c
 rmodules-y += vboot_wrapper.c
VB_LIB = $(obj)/external/vboot_reference/vboot_fw.a
-VB_FIRMWARE_ARCH := $(ARCHDIR-y)
+# Currently, vboot comes into picture only during the romstage, thus
+# is compiled for being used in romstage only. Since, we are splitting
+# up all components in one of the three stages of coreboot, vboot seems
+# most logical to fall under the romstage. Thus, all references to arch
+# and other compiler stuff for vboot is using the romstage arch.
+VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-ROMSTAGE-y))
 VB_SOURCE := vboot_reference
# Add the vboot include paths.
@@ -62,11 +67,11 @@ VBOOT_STUB_DEPS += $(obj)/arch/x86/lib/memcpy.rmodules.o
 VBOOT_STUB_DEPS += $(VB_LIB)
 # Remove the '-include' option since that will break vboot's build and ensure
 # vboot_reference can get to coreboot's include files.
-VBOOT_CFLAGS += $(patsubst -I%,-I../%,$(filter-out -include $(src)/include/kconfig.h, $(CFLAGS)))
+VBOOT_CFLAGS += $(patsubst -I%,-I../%,$(filter-out -include $(src)/include/kconfig.h, $(CFLAGS_romstage)))
 VBOOT_CFLAGS += -DVBOOT_DEBUG
$(VBOOT_STUB_DOTO): $(VBOOT_STUB_DEPS)
-	$(CC) $(LDFLAGS) -nostdlib -r -o $@ $^
+	$(CC_romstage) $(LDFLAGS) -nostdlib -r -o $@ $^
# Link the vbootstub module with a 64KiB-byte heap.
 $(eval $(call rmodule_link,$(VBOOT_STUB_ELF), $(VBOOT_STUB_DOTO), 0x10000))
@@ -75,6 +80,7 @@ $(eval $(call rmodule_link,$(VBOOT_STUB_ELF), $(VBOOT_STUB_DOTO), 0x10000))
 $(VB_LIB):
    @printf "    MAKE       $(subst $(obj)/,,$(@))\n"
    $(Q)FIRMWARE_ARCH=$(VB_FIRMWARE_ARCH) \
+		CC="$(CC_romstage)" \
    	CFLAGS="$(VBOOT_CFLAGS)" \
    	make -C $(VB_SOURCE) \
    	BUILD=../$(dir $(VB_LIB)) \
diff --git a/src/vendorcode/intel/Makefile.inc b/src/vendorcode/intel/Makefile.inc
index 8569af0..fe981b4 100644
--- a/src/vendorcode/intel/Makefile.inc
+++ b/src/vendorcode/intel/Makefile.inc
@@ -23,5 +23,8 @@ FSP_SRC_FILES := $(wildcard src/vendorcode/intel/$(FSP_PATH)srx/*.c)
 FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)srx/$(notdir $(file)))
 ramstage-y += $(FSP_C_INPUTS)
-CC := $(CC) -Isrc/vendorcode/intel/$(FSP_PATH)include
+CC_bootblock := $(CC_bootblock) -Isrc/vendorcode/intel/$(FSP_PATH)include
+CC_romstage := $(CC_romstage) -Isrc/vendorcode/intel/$(FSP_PATH)include
+CC_ramstage := $(CC_ramstage) -Isrc/vendorcode/intel/$(FSP_PATH)include
+CC_i386 := $(CC_i386) -Isrc/vendorcode/intel/$(FSP_PATH)include
 endif

    

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[coreboot-gerrit] Patch set updated for coreboot: 27806d0 Introduce stage-specific architecture for coreboot