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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63552 )
Change subject: mb/google/brya: Reset XHCI controller while preparing for S5
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Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63552/comment/4574ee5d_724c7817
PS4, Line 37: SMI handler
Sorry, thinking error on my part. […]
This is intended to be a temporary workaround until we have a permanent solution/workaround from Intel. We suspect the permanent solution will end up in the ADL-P chipset blob collateral (i.e. not FSP), but don't know for sure yet, and this should be able to be reverted later.
_PTS may work, would have to test that there are no additional operations that happen after that runs to change the IP state again.
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