[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/common/block/cse: Add API to match current PM event

[Subrata Banik (Code Review)]

Attention is currently required from: Intel coreboot Reviewers, Jérémy Compostella, Karthik Ramasubramanian, Krishna P Bhat D.

Subrata Banik has posted comments on this change by Karthik Ramasubramanian. ( https://review.coreboot.org/c/coreboot/+/86169?usp=email )

Change subject: soc/intel/common/block/cse: Add API to match current PM event
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Patch Set 3:

(1 comment)

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/86169/comment/3f225a01_5b487954?usp... :
PS3, Line 301: #define ME_HFSTS2_CUR_PM_EVENT_SHIFT 24
> There are 16 events listed in the doc. For now, we are hitting only this event that is equivalent to S5. I can update the API as `bool cse_match_host_cold_reset(void)` to check for an equivalent of S5 reset and include `Power cycle reset through CMOFF` event for now. We can internally update the API to check for other events as we learn more from Intel.

sounds like a step wise approach and i fully agree to this. we should land initial CLs and seek feedback from Intel to map the S5 equivalent reset types from CSE reset types to ensure we are not just limited to  `Power cycle reset through CMOFF` alone in future.