[coreboot-gerrit] Change in ...coreboot[master]: mediatek/mt8183: modify vsim2 calibration

[hsin-hsiung wang (Code Review)]

hsin-hsiung wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32057

Change subject: mediatek/mt8183: modify vsim2 calibration
......................................................................

mediatek/mt8183: modify vsim2 calibration

This patch modifies vsim2 calibration to meet 2.7V

BUG=b:126139364
BRANCH=none
TEST=measure vsim2 voltage with multimeter

Change-Id: I4dffdde89cbde91286d92e6c2b445f0b3d0ad2fe
Signed-off-by: Hsin-Hsiung Wang 
---
M src/soc/mediatek/mt8183/include/soc/mt6358.h
M src/soc/mediatek/mt8183/mt6358.c
2 files changed, 33 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/32057/1

diff --git a/src/soc/mediatek/mt8183/include/soc/mt6358.h b/src/soc/mediatek/mt8183/include/soc/mt6358.h
index 02937ba..157f6be 100644
--- a/src/soc/mediatek/mt8183/include/soc/mt6358.h
+++ b/src/soc/mediatek/mt8183/include/soc/mt6358.h
@@ -27,6 +27,21 @@
    PMIC_CPSDSA4                  = 0x0a2e,
    PMIC_VDRAM1_VOSEL_SLEEP       = 0x160a,
    PMIC_SMPS_ANA_CON0            = 0x1808,
+	PMIC_VSIM2_ANA_CON0	          = 0x1c34,
+};
+
+enum {
+	VSIM2_CALI_POS_0_MV = 0,
+	VSIM2_CALI_POS_10_MV,
+	VSIM2_CALI_POS_20_MV,
+	VSIM2_CALI_POS_30_MV,
+	VSIM2_CALI_POS_40_MV,
+	VSIM2_CALI_POS_50_MV,
+	VSIM2_CALI_POS_60_MV,
+	VSIM2_CALI_POS_70_MV,
+	VSIM2_CALI_POS_80_MV,
+	VSIM2_CALI_POS_90_MV,
+	VSIM2_CALI_POS_100_MV,
 };

struct pmic_setting {
diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c
index 3dc9fe2..bcddb783 100644
--- a/src/soc/mediatek/mt8183/mt6358.c
+++ b/src/soc/mediatek/mt8183/mt6358.c
@@ -769,6 +769,23 @@
    		lp_setting[i].mask, lp_setting[i].shift);
 }

+static void pmic_set_vsim2_cali(void)
+{
+	u16 vsim2_cali;
+
+	/* [11:8]=0x8, RG_VSIM2_VOSEL = 2.7V */
+	pwrap_write_field(PMIC_VSIM2_ANA_CON0, 0x8, 0xF, 8);
+
+	/* [3:0], RG_VSIM2_VOCAL */
+	vsim2_cali = pwrap_read_field(PMIC_VSIM2_ANA_CON0, 0xF, 0);
+	if (vsim2_cali > VSIM2_CALI_POS_60_MV)
+		vsim2_cali -= VSIM2_CALI_POS_60_MV;
+	else
+		vsim2_cali = VSIM2_CALI_POS_0_MV;
+
+	pwrap_write_field(PMIC_VSIM2_ANA_CON0, vsim2_cali, 0xF, 0);
+}
+
 void mt6358_init(void)
 {
    if (pwrap_init())
@@ -780,4 +797,5 @@
    wk_sleep_voltage_by_ddr();
    wk_power_down_seq();
    mt6358_lp_setting();
+	pmic_set_vsim2_cali();
 }