Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47693 )
Change subject: ACPI S3: Replace acpi_is_wakeup() ......................................................................
ACPI S3: Replace acpi_is_wakeup()
It was supposed to return true for both S2 and S3, but level S2 was never stored in acpi_slp_type or otherwise implemented.
Change-Id: Ida0165e647545069c0d42d38b9f45a95e78dacbe Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/47693 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/acpi/acpi.c M src/arch/x86/acpi_s3.c M src/cpu/amd/agesa/family14/model_14_init.c M src/cpu/amd/agesa/family15tn/model_15_init.c M src/cpu/amd/agesa/family16kb/model_16_init.c M src/include/acpi/acpi.h M src/lib/hardwaremain.c M src/vendorcode/google/chromeos/elog.c 8 files changed, 7 insertions(+), 16 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c index 259813b..5fb2422 100644 --- a/src/acpi/acpi.c +++ b/src/acpi/acpi.c @@ -1541,7 +1541,7 @@ void *wake_vec; int i;
- if (!acpi_is_wakeup()) + if (!acpi_is_wakeup_s3()) return NULL;
printk(BIOS_DEBUG, "Trying to find the wakeup vector...\n"); diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c index af4ab5e..1c30432 100644 --- a/src/arch/x86/acpi_s3.c +++ b/src/arch/x86/acpi_s3.c @@ -12,7 +12,7 @@
#if ENV_RAMSTAGE || ENV_POSTCAR
-/* This is filled with acpi_is_wakeup() call early in ramstage. */ +/* This is filled with acpi_is_wakeup_s3() call early in ramstage. */ static int acpi_slp_type = -1;
static void acpi_handoff_wakeup(void) @@ -28,13 +28,6 @@ } }
-int acpi_is_wakeup(void) -{ - acpi_handoff_wakeup(); - /* Both resume from S2 and resume from S3 restart at CPU reset */ - return (acpi_slp_type == ACPI_S3 || acpi_slp_type == ACPI_S2); -} - int acpi_is_wakeup_s3(void) { acpi_handoff_wakeup(); diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c index de5bcdc..942539c 100644 --- a/src/cpu/amd/agesa/family14/model_14_init.c +++ b/src/cpu/amd/agesa/family14/model_14_init.c @@ -52,7 +52,7 @@ msr.lo |= SYSCFG_MSR_MtrrFixDramEn; wrmsr(SYSCFG_MSR, msr);
- if (acpi_is_wakeup()) + if (acpi_is_wakeup_s3()) restore_mtrr();
x86_mtrr_check(); diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c index c2406d8..83efb44 100644 --- a/src/cpu/amd/agesa/family15tn/model_15_init.c +++ b/src/cpu/amd/agesa/family15tn/model_15_init.c @@ -51,7 +51,7 @@ msr.lo |= SYSCFG_MSR_MtrrFixDramEn; wrmsr(SYSCFG_MSR, msr);
- if (acpi_is_wakeup()) + if (acpi_is_wakeup_s3()) restore_mtrr();
x86_mtrr_check(); diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c index 2f4fd63..c1c7577 100644 --- a/src/cpu/amd/agesa/family16kb/model_16_init.c +++ b/src/cpu/amd/agesa/family16kb/model_16_init.c @@ -49,7 +49,7 @@ msr.lo |= SYSCFG_MSR_MtrrFixDramEn; wrmsr(SYSCFG_MSR, msr);
- if (acpi_is_wakeup()) + if (acpi_is_wakeup_s3()) restore_mtrr();
x86_mtrr_check(); diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h index 2fc5f8e..bdea467 100644 --- a/src/include/acpi/acpi.h +++ b/src/include/acpi/acpi.h @@ -1070,12 +1070,10 @@ return (acpi_get_sleep_type() == ACPI_S3); } #else -int acpi_is_wakeup(void); int acpi_is_wakeup_s3(void); #endif
#else -static inline int acpi_is_wakeup(void) { return 0; } static inline int acpi_is_wakeup_s3(void) { return 0; } #endif
diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index 3fe50c9..173ee97 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -444,7 +444,7 @@ post_code(POST_ENTRY_RAMSTAGE);
/* Handoff sleep type from romstage. */ - acpi_is_wakeup(); + acpi_is_wakeup_s3(); threads_initialize();
/* Schedule the static boot state entries. */ diff --git a/src/vendorcode/google/chromeos/elog.c b/src/vendorcode/google/chromeos/elog.c index 523b7c4..dff7520 100644 --- a/src/vendorcode/google/chromeos/elog.c +++ b/src/vendorcode/google/chromeos/elog.c @@ -19,7 +19,7 @@ }
/* Skip logging developer mode in ACPI resume path */ - if (dev && !acpi_is_wakeup()) { + if (dev && !acpi_is_wakeup_s3()) {
elog_add_event(ELOG_TYPE_CROS_DEVELOPER_MODE); printk(BIOS_DEBUG, "%s: Logged dev mode boot\n", __func__);