[coreboot-gerrit] [S] Change in coreboot[main]: arch/arm64/cache: Add cache_numsets and cache_line_bytes

[Martin L Roth (Code Review)]

Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/78846?usp=email )

Change subject: arch/arm64/cache: Add cache_numsets and cache_line_bytes
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arch/arm64/cache: Add cache_numsets and cache_line_bytes

Add two more helper functions for the ARM64 cache:

- cache_numsets to retrieve the number of sets in a cache
 - cache_line_bytes to retrieve the number of bytes per cache line

Background: We need those functions for a mainboard we are currently
working on.

Change-Id: Iec6e7e66a12ca6acb4a1f2158866bc91aa3f7e25
Signed-off-by: David Milosevic 
---
M src/arch/arm64/armv8/cache.c
M src/arch/arm64/include/armv8/arch/cache.h
2 files changed, 20 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/78846/1

diff --git a/src/arch/arm64/armv8/cache.c b/src/arch/arm64/armv8/cache.c
index dbaedec..2382ddf 100644
--- a/src/arch/arm64/armv8/cache.c
+++ b/src/arch/arm64/armv8/cache.c
@@ -86,6 +86,20 @@
    return line_bytes;
 }

+uint64_t cache_numsets(const enum cache_level level, const enum cache_type type)
+{
+	/* select cache...and read back its ID register afterwards */
+	raw_write_csselr_el1(((level - 1) << 1) | (type == CACHE_INSTRUCTION));
+	return get_ccsidr_el1_numsets( raw_read_ccsidr_el1() ) + 1;
+}
+
+uint8_t cache_line_bytes(const enum cache_level level, const enum cache_type type)
+{
+	/* select cache...and read back its ID register afterwards */
+	raw_write_csselr_el1(((level - 1) << 1) | (type == CACHE_INSTRUCTION));
+	return (1 << ((raw_read_ccsidr_el1() & 0x7) + 4));
+}
+
 enum dcache_op {
    OP_DCCSW,
    OP_DCCISW,
diff --git a/src/arch/arm64/include/armv8/arch/cache.h b/src/arch/arm64/include/armv8/arch/cache.h
index 3a72d40..9b0ef32 100644
--- a/src/arch/arm64/include/armv8/arch/cache.h
+++ b/src/arch/arm64/include/armv8/arch/cache.h
@@ -51,6 +51,12 @@
 /* returns number of bytes per cache line */
 unsigned int dcache_line_bytes(void);

+/* returns number of sets in the specified cache */
+uint64_t cache_numsets(const enum cache_level level, const enum cache_type type);
+
+/* returns number of bytes per cache line of the specified cache */
+uint8_t cache_line_bytes(const enum cache_level level, const enum cache_type type);
+
 /* Invalidate all TLB entries. */
 static inline void tlb_invalidate_all(void)
 {