12 Jul
2020
12 Jul
'20
9:54 a.m.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32070 )
Change subject: [WIP]mb/*: Migrate sandybridge MRC settings to devicetree.cb ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/32070/11/src/mainboard/google/butte... File src/mainboard/google/butterfly/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/32070/11/src/mainboard/google/butte... PS11, Line 27: register "max_mem_clock_mhz" = "800" # DDR3-1600 Looks like this was changed from DDR3-1333 to DDR3-1600
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Gerrit-Change-Id: Ica844a70b50486b4db3744cb123b3e4b8d5bedb0
Gerrit-Change-Number: 32070
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