[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Hook up DPTF device to devicetree

[Nico Huber (Code Review)]

Attention is currently required from:  Felix Singer, Tim Crawford, Patrick Rudolph, Jeremy Soller, Christian Walter, Tim Wawrzynczak, Michael Niewöhner.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59887 )

Change subject: soc/intel/cannonlake: Hook up DPTF device to devicetree
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Patch Set 4: Code-Review+1

(2 comments)

File src/mainboard/google/hatch/variants/baseboard/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/59887/comment/6188ddf3_b0e7757d 
PS4, Line 204: 		device pci 04.0 on  end # SA Thermal device
I would prefer separate changes for devices that had it `off` by accident.
This will change coreboot's behavior, for instance if the allocator handles
the device, if PCI drivers will be run (couldn't find one, but in soc/intel/
it's not easy to find anything) etc.

File src/mainboard/system76/bonw14/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/59887/comment/60a9866b_4539b937 
PS4, Line 72: 		device pci 04.0 off end # SA Thermal device
> Looks like it was my mistake when upstreaming the board, forgetting the FSP config.

Do you mean the intention was to enable it?