Attention is currently required from: Lance Zhao, Kyösti Mälkki, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50648 )
Change subject: ACPI: Use common OperationRegion for PCI_MMONF ......................................................................
Patch Set 3: Code-Review+2
(1 comment)
File src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl:
https://review.coreboot.org/c/coreboot/+/50648/comment/9af4cc6b_0cf8990e PS3, Line 289: /* XHCI */ : Offset(0x00080010), /* Base address */ : XHBA, 32, : Offset(0x0008002c), /* Subsystem ID / Vendor ID */ : XH2C, 32, : : Offset(0x00080048), /* Indirect PCI Index Register */ : IDEX, 32, : DATA, 32, : Offset(0x00080054), /* PME Control / Status */ : U_PS, 2, : : /* EHCI */ : Offset(0x00090004), /* Control */ : , 1, : EHME, 1, : Offset(0x00090010), /* Base address */ : EHBA, 32, : Offset(0x0009002c), /* Subsystem ID / Vendor ID */ : EH2C, 32, : Offset(0x00090054), /* EHCI Spare 1 */ : EH54, 8, : Offset(0x00090064), /* Misc Control 2 */ : EH64, 8, : : Offset(0x000900c4), /* PME Control / Status */ : E_PS, 2, : : /* LPC Bridge */ : Offset(0x000a30cb), /* ClientRomProtect[31:24] */ : , 7, : AUSS, 1, /* AutoSizeStart */ I think we might be able to delete all of this.