[coreboot-gerrit] Change in coreboot[master]: soc/intel/denverton_ns: Enable Fast Strings

[Julien Viard de Galbert (Code Review)]

Julien Viard de Galbert has uploaded this change for review. ( https://review.coreboot.org/25431

Change subject: soc/intel/denverton_ns: Enable Fast Strings
......................................................................

soc/intel/denverton_ns: Enable Fast Strings

Change-Id: I7cee3c40299abf14a24128b1ac14f1823f87a0e1
Signed-off-by: Julien Viard de Galbert 
---
M src/soc/intel/denverton_ns/cpu.c
M src/soc/intel/denverton_ns/include/soc/msr.h
2 files changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/25431/1

diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c
index 528d2e5..fba6627 100644
--- a/src/soc/intel/denverton_ns/cpu.c
+++ b/src/soc/intel/denverton_ns/cpu.c
@@ -2,6 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2015 - 2017 Intel Corp.
+ * Copyright (C) 2018 Online SAS
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -39,6 +40,11 @@

printk(BIOS_DEBUG, "Init Denverton-NS SoC cores.\n");

+	/* Enable Fast Strings */
+	msr = rdmsr(IA32_MISC_ENABLE);
+	msr.lo |= FAST_STRINGS_ENABLE_BIT;
+	wrmsr(IA32_MISC_ENABLE, msr);
+
    /* Enable Turbo */
    enable_turbo();

diff --git a/src/soc/intel/denverton_ns/include/soc/msr.h b/src/soc/intel/denverton_ns/include/soc/msr.h
index 4d1ac70..d56cc65 100644
--- a/src/soc/intel/denverton_ns/include/soc/msr.h
+++ b/src/soc/intel/denverton_ns/include/soc/msr.h
@@ -106,6 +106,7 @@
 #define PRMRR_SUPPORTED (1 << 12)

/* IA32_MISC_ENABLE bits */
+#define FAST_STRINGS_ENABLE_BIT (1 << 0)
 #define SPEED_STEP_ENABLE_BIT (1 << 16)

/* Read BCLK from MSR */