[coreboot-gerrit] Change in coreboot[master]: soc/intel/cannonlake: Add ability to disable Heci1

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32992 )

Change subject: soc/intel/cannonlake: Add ability to disable Heci1
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Patch Set 16:
> Patch Set 16: Code-Review+2
>
> Kindly note, making HECI disable using PMC API has ~20ms of boot time penalties. so to make sure we are not surprise to see ReadToBoot time increases by ~20ms now onwards

kindly ignore this msg, it was some FSP issue which causes 20ms regression. we are good now once FSP boot time regression got fixed, this CL is good now. with ~2ms of extra time taken..