[coreboot-gerrit] Change in coreboot[master]: sb/intel/common/smbus_ops.c: Clean up read resources

[Nico Huber (Code Review)]

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48538 )

Change subject: sb/intel/common/smbus_ops.c: Clean up read resources
......................................................................

sb/intel/common/smbus_ops.c: Clean up read resources

Using `pci_dev_read_resources` works just as well on bd82x6x (the
allocator does the same) and allows dropping the i82801gx check.

Change-Id: I1cb05131a82ebb7c45827eff8e09e445d9c695b3
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48538
Reviewed-by: Nico Huber 
Tested-by: build bot (Jenkins) 
---
M src/southbridge/intel/common/smbus_ops.c
1 file changed, 2 insertions(+), 7 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved

diff --git a/src/southbridge/intel/common/smbus_ops.c b/src/southbridge/intel/common/smbus_ops.c
index b0ecc1a..46fc58a 100644
--- a/src/southbridge/intel/common/smbus_ops.c
+++ b/src/southbridge/intel/common/smbus_ops.c
@@ -67,17 +67,12 @@

void smbus_read_resources(struct device *dev)
 {
+	pci_dev_read_resources(dev);
+
    struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4);
    res->base = CONFIG_FIXED_SMBUS_IO_BASE;
    res->size = 32;
    res->limit = res->base + res->size - 1;
    res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE |
    	     IORESOURCE_STORED | IORESOURCE_ASSIGNED;
-
-	/* The memory BAR does not exist for ICH7 and earlier */
-	if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX))
-		return;
-
-	/* Also add MMIO resource */
-	res = pci_get_resource(dev, PCI_BASE_ADDRESS_0);
 }