[coreboot-gerrit] [XS] Change in coreboot[main]: mb/google/fatcat: Increase PL4 power limits for PTL-H variants

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86388?usp=email )

Change subject: mb/google/fatcat: Increase PL4 power limits for PTL-H variants
......................................................................

mb/google/fatcat: Increase PL4 power limits for PTL-H variants

Increase PL4 power limit values for all Intel PTL-H variants on Fatcat
from 50000 to 64000 to ensure successful boot and adequate performance
with 45W and 65W USB-C adapters. This prevents system bottlenecks when
using lower-wattage power supplies.

BUG=b:395130929
TEST=Verified successful boot with 45W and 65W USB-C travel adapters,
as well as 96W/106W USB-C adapters.

Change-Id: I6073e748e9f8c7317f0ad9a1193699e34703bdba
Signed-off-by: Subrata Banik 
---
M src/mainboard/google/fatcat/variants/baseboard/fatcat/ramstage.c
1 file changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/86388/1

diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/ramstage.c b/src/mainboard/google/fatcat/variants/baseboard/fatcat/ramstage.c
index a808c90..3837679 100644
--- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/ramstage.c
+++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/ramstage.c
@@ -16,7 +16,7 @@
    	.pl1_max_power = 25000,
    	.pl2_min_power = 50000,
    	.pl2_max_power = 50000,
-		.pl4_power = 50000 /* TODO: needs fine tuning */
+		.pl4_power = 64000
    },
    {
    	.mch_id = PCI_DID_INTEL_PTL_H_ID_2,
@@ -26,7 +26,7 @@
    	.pl1_max_power = 25000,
    	.pl2_min_power = 50000,
    	.pl2_max_power = 50000,
-		.pl4_power = 50000 /* TODO: needs fine tuning */
+		.pl4_power = 64000
    },
    {
    	.mch_id = PCI_DID_INTEL_PTL_H_ID_3,
@@ -36,7 +36,7 @@
    	.pl1_max_power = 25000,
    	.pl2_min_power = 50000,
    	.pl2_max_power = 50000,
-		.pl4_power = 50000 /* TODO: needs fine tuning */
+		.pl4_power = 64000
    },
    {
    	.mch_id = PCI_DID_INTEL_PTL_H_ID_4,
@@ -46,7 +46,7 @@
    	.pl1_max_power = 25000,
    	.pl2_min_power = 50000,
    	.pl2_max_power = 50000,
-		.pl4_power = 50000 /* TODO: needs fine tuning */
+		.pl4_power = 64000
    },
 };