Hello Patrick Rudolph, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32475
to look at the new patch set (#2).
Change subject: soc/intel/cannonlake: Modify dq_map to provide for 6 entries ......................................................................
soc/intel/cannonlake: Modify dq_map to provide for 6 entries
Intel's DQ_DQS_RComp_Info_Utility generates data for 6 entries. MRC will return errors if we don't have all 6 entries in the map.
BRANCH=none BUG=b:131103736 TEST=ensure the firmware builds without error; I don't have hardware available to test this just yet.
Change-Id: I20a768de0e4440d7dde7b717794c4e2d0c62819c Signed-off-by: Paul Fagerburg pfagerburg@chromium.org --- M src/soc/intel/cannonlake/include/soc/cnl_memcfg_init.h 1 file changed, 9 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/32475/2