Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36463 )
Change subject: soc/intel/{cnl,icl,skl}: Move sleepstates.asl into common/block/acpi ......................................................................
soc/intel/{cnl,icl,skl}: Move sleepstates.asl into common/block/acpi
This patch creates a common instance of sleepstates.asl inside intel common code (soc/intel/common/block/acpi/acpi) and ask skl, cnl & icl soc code to refer sleepstates.asl from common code block.
TEST=Able to build and boot Hatch and ICL DE system. Dump DSDT.asl to verify S0/S3/S4/S5 entries after booting to OS.
Change-Id: Ie2132189f91211df74f8b5546da63ded4fdf687a Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/asrock/h110m/dsdt.asl M src/mainboard/google/dragonegg/dsdt.asl M src/mainboard/google/drallion/dsdt.asl M src/mainboard/google/eve/dsdt.asl M src/mainboard/google/fizz/dsdt.asl M src/mainboard/google/glados/dsdt.asl M src/mainboard/google/hatch/dsdt.asl M src/mainboard/google/poppy/dsdt.asl M src/mainboard/google/sarien/dsdt.asl M src/mainboard/intel/cannonlake_rvp/dsdt.asl M src/mainboard/intel/coffeelake_rvp/dsdt.asl M src/mainboard/intel/icelake_rvp/dsdt.asl M src/mainboard/intel/kblrvp/dsdt.asl M src/mainboard/intel/kunimitsu/dsdt.asl M src/mainboard/intel/saddlebrook/dsdt.asl M src/mainboard/purism/librem_skl/dsdt.asl M src/mainboard/razer/blade_stealth_kbl/dsdt.asl M src/mainboard/supermicro/x11-lga1151-series/dsdt.asl R src/soc/intel/common/block/acpi/acpi/sleepstates.asl D src/soc/intel/icelake/acpi/sleepstates.asl D src/soc/intel/skylake/acpi/sleepstates.asl 21 files changed, 21 insertions(+), 62 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/36463/1
diff --git a/src/mainboard/asrock/h110m/dsdt.asl b/src/mainboard/asrock/h110m/dsdt.asl index f3e216d..49919d8 100644 --- a/src/mainboard/asrock/h110m/dsdt.asl +++ b/src/mainboard/asrock/h110m/dsdt.asl @@ -48,7 +48,7 @@ }
// Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
// Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/google/dragonegg/dsdt.asl b/src/mainboard/google/dragonegg/dsdt.asl index 8a43784..65c7be2 100644 --- a/src/mainboard/google/dragonegg/dsdt.asl +++ b/src/mainboard/google/dragonegg/dsdt.asl @@ -49,7 +49,7 @@ #endif
// Chipset specific sleep states - #include <soc/intel/icelake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ Scope (_SB.PCI0.LPCB) diff --git a/src/mainboard/google/drallion/dsdt.asl b/src/mainboard/google/drallion/dsdt.asl index 5ffdf18..4d2c4bf 100644 --- a/src/mainboard/google/drallion/dsdt.asl +++ b/src/mainboard/google/drallion/dsdt.asl @@ -54,7 +54,7 @@ #endif
/* Chipset specific sleep states */ - #include <soc/intel/cannonlake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
/* Low power idle table */ #include <soc/intel/cannonlake/acpi/lpit.asl> diff --git a/src/mainboard/google/eve/dsdt.asl b/src/mainboard/google/eve/dsdt.asl index a705457..bf207b7 100644 --- a/src/mainboard/google/eve/dsdt.asl +++ b/src/mainboard/google/eve/dsdt.asl @@ -48,7 +48,7 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */ - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ Scope (_SB.PCI0.LPCB) diff --git a/src/mainboard/google/fizz/dsdt.asl b/src/mainboard/google/fizz/dsdt.asl index 03df2b9..112673c 100644 --- a/src/mainboard/google/fizz/dsdt.asl +++ b/src/mainboard/google/fizz/dsdt.asl @@ -48,7 +48,7 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */ - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ Scope (_SB.PCI0.LPCB) diff --git a/src/mainboard/google/glados/dsdt.asl b/src/mainboard/google/glados/dsdt.asl index af5f99d..6fe0cbd 100644 --- a/src/mainboard/google/glados/dsdt.asl +++ b/src/mainboard/google/glados/dsdt.asl @@ -49,7 +49,7 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
// Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
// Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/google/hatch/dsdt.asl b/src/mainboard/google/hatch/dsdt.asl index 344e4a7..fd3df6e 100644 --- a/src/mainboard/google/hatch/dsdt.asl +++ b/src/mainboard/google/hatch/dsdt.asl @@ -52,10 +52,10 @@ #endif
/* Chipset specific sleep states */ - #include <soc/intel/cannonlake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
- /* Low power idle table */ - #include <soc/intel/cannonlake/acpi/lpit.asl> + /* Low power idle table */ + #include <soc/intel/cannonlake/acpi/lpit.asl>
/* Chrome OS Embedded Controller */ Scope (_SB.PCI0.LPCB) diff --git a/src/mainboard/google/poppy/dsdt.asl b/src/mainboard/google/poppy/dsdt.asl index 34862df..dd02606 100644 --- a/src/mainboard/google/poppy/dsdt.asl +++ b/src/mainboard/google/poppy/dsdt.asl @@ -55,7 +55,7 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
/* Chipset specific sleep states */ - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
/* Chrome OS Embedded Controller */ Scope (_SB.PCI0.LPCB) diff --git a/src/mainboard/google/sarien/dsdt.asl b/src/mainboard/google/sarien/dsdt.asl index 22e283f..5cfde62 100644 --- a/src/mainboard/google/sarien/dsdt.asl +++ b/src/mainboard/google/sarien/dsdt.asl @@ -54,7 +54,7 @@ #endif
/* Chipset specific sleep states */ - #include <soc/intel/cannonlake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
/* Low power idle table */ #include <soc/intel/cannonlake/acpi/lpit.asl> diff --git a/src/mainboard/intel/cannonlake_rvp/dsdt.asl b/src/mainboard/intel/cannonlake_rvp/dsdt.asl index 5f4a349..4b7454c 100644 --- a/src/mainboard/intel/cannonlake_rvp/dsdt.asl +++ b/src/mainboard/intel/cannonlake_rvp/dsdt.asl @@ -45,6 +45,6 @@ #endif
// Chipset specific sleep states - #include <soc/intel/cannonlake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
} diff --git a/src/mainboard/intel/coffeelake_rvp/dsdt.asl b/src/mainboard/intel/coffeelake_rvp/dsdt.asl index c5f1136..952f345 100644 --- a/src/mainboard/intel/coffeelake_rvp/dsdt.asl +++ b/src/mainboard/intel/coffeelake_rvp/dsdt.asl @@ -45,6 +45,6 @@ #endif
// Chipset specific sleep states - #include <soc/intel/cannonlake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
} diff --git a/src/mainboard/intel/icelake_rvp/dsdt.asl b/src/mainboard/intel/icelake_rvp/dsdt.asl index 15890f1..c84e41a 100644 --- a/src/mainboard/intel/icelake_rvp/dsdt.asl +++ b/src/mainboard/intel/icelake_rvp/dsdt.asl @@ -60,7 +60,7 @@ #endif
// Chipset specific sleep states - #include <soc/intel/icelake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
// Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl index 8a16551..83db423 100644 --- a/src/mainboard/intel/kblrvp/dsdt.asl +++ b/src/mainboard/intel/kblrvp/dsdt.asl @@ -57,7 +57,7 @@ #endif
// Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
// Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/intel/kunimitsu/dsdt.asl b/src/mainboard/intel/kunimitsu/dsdt.asl index af5f99d..6fe0cbd 100644 --- a/src/mainboard/intel/kunimitsu/dsdt.asl +++ b/src/mainboard/intel/kunimitsu/dsdt.asl @@ -49,7 +49,7 @@ #include <vendorcode/google/chromeos/acpi/chromeos.asl>
// Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
// Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/intel/saddlebrook/dsdt.asl b/src/mainboard/intel/saddlebrook/dsdt.asl index ac929a6..eb053b1 100644 --- a/src/mainboard/intel/saddlebrook/dsdt.asl +++ b/src/mainboard/intel/saddlebrook/dsdt.asl @@ -43,7 +43,7 @@ }
// Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
// Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/purism/librem_skl/dsdt.asl b/src/mainboard/purism/librem_skl/dsdt.asl index 1bf202e..14525d7 100644 --- a/src/mainboard/purism/librem_skl/dsdt.asl +++ b/src/mainboard/purism/librem_skl/dsdt.asl @@ -44,7 +44,7 @@ }
// Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
// Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl index e110067..72184eb 100644 --- a/src/mainboard/razer/blade_stealth_kbl/dsdt.asl +++ b/src/mainboard/razer/blade_stealth_kbl/dsdt.asl @@ -43,7 +43,7 @@
} // Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
#include "acpi/mainboard.asl" } diff --git a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl index ac929a6..eb053b1 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl +++ b/src/mainboard/supermicro/x11-lga1151-series/dsdt.asl @@ -43,7 +43,7 @@ }
// Chipset specific sleep states - #include <soc/intel/skylake/acpi/sleepstates.asl> + #include <soc/intel/common/block/acpi/acpi/sleepstates.asl>
// Mainboard specific #include "acpi/mainboard.asl" diff --git a/src/soc/intel/cannonlake/acpi/sleepstates.asl b/src/soc/intel/common/block/acpi/acpi/sleepstates.asl similarity index 94% rename from src/soc/intel/cannonlake/acpi/sleepstates.asl rename to src/soc/intel/common/block/acpi/acpi/sleepstates.asl index 2a351b6..1ab0e68 100644 --- a/src/soc/intel/cannonlake/acpi/sleepstates.asl +++ b/src/soc/intel/common/block/acpi/acpi/sleepstates.asl @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2017-2018 Intel Corp. + * Copyright (C) 2019 Intel Corp. * * * This program is free software; you can redistribute it and/or modify diff --git a/src/soc/intel/icelake/acpi/sleepstates.asl b/src/soc/intel/icelake/acpi/sleepstates.asl deleted file mode 100644 index 13cc358..0000000 --- a/src/soc/intel/icelake/acpi/sleepstates.asl +++ /dev/null @@ -1,20 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2018 Intel Corp. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name (_S0, Package () { 0x0, 0x0, 0x0, 0x0 }) -Name (_S3, Package () { 0x5, 0x5, 0x0, 0x0 }) -Name (_S5, Package () { 0x7, 0x7, 0x0, 0x0 }) diff --git a/src/soc/intel/skylake/acpi/sleepstates.asl b/src/soc/intel/skylake/acpi/sleepstates.asl deleted file mode 100644 index 905a3e2..0000000 --- a/src/soc/intel/skylake/acpi/sleepstates.asl +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * Copyright (C) 2014 Google Inc. - * Copyright (C) 2015 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -Name (_S0, Package () { 0x0, 0x0, 0x0, 0x0 }) -Name (_S3, Package () { 0x5, 0x5, 0x0, 0x0 }) -Name (_S4, Package () { 0x6, 0x6, 0x0, 0x0 }) -Name (_S5, Package () { 0x7, 0x7, 0x0, 0x0 })