Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Subrata Banik.
Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84103?usp=email )
Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
......................................................................
Patch Set 7:
(1 comment)
File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/84103/comment/30e2d333_b5b01ec2?usp... :
PS7, Line 121: if (CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_USE_GPE1)) {
Acknowledged
Subrata,
| fadt->gpe1_blk = GPE1_STS(0) ? (pmbase + GPE1_STS(0)) : GPE1_STS(0);
in the case that _HAVE_GPE1 = true ; _USE_GPE1 = false, we need to set
gpe1_blk=0, gpe1_blk_len=0, and gpe1_base=0 in FADT. GPE1_STS(0) has none-zero vaule and we will need to check _USE_GPE1 flag instead of using GPE1_STS(0) check, isn't?
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