Hello Felix Held, build bot (Jenkins), Michał Żygowski,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/35849
to look at the new patch set (#2).
Change subject: superio/nuvoton/nct5104d: assign IO port range to control GPIO ......................................................................
superio/nuvoton/nct5104d: assign IO port range to control GPIO
Now, Super I/O GPIOs can also be controlled directly through access to I/O registers. LDN 8 and specific I/O port from range <100h; ff9h> need to be enabled in mainboard devictree.
Change-Id: I4ce99bb44e6f5db684170f4190bdc38a944849f6 Signed-off-by: Piotr Kleinschmidt piotr.kleinschmidt@3mdeb.com --- M src/device/pnp_device.c M src/include/device/pnp.h M src/mainboard/pcengines/apu1/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu2/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu4/devicetree.cb M src/mainboard/pcengines/apu2/variants/apu5/devicetree.cb M src/superio/nuvoton/nct5104d/chip.h M src/superio/nuvoton/nct5104d/nct5104d.h M src/superio/nuvoton/nct5104d/superio.c 10 files changed, 82 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/35849/2