Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85734?usp=email )
Change subject: soc/mediatek/mt8196: Add MT6685 Clock IC driver ......................................................................
soc/mediatek/mt8196: Add MT6685 Clock IC driver
Add MT6685 initial settings and ADC init settings to support Thermal Information Acquisition (TIA). TIA will read thermal info in HW.
TEST=Build pass BUG=b:317009620
Change-Id: I26ae4f416202f04a8030259c49e009b19a60712e Signed-off-by: Hope Wang hope.wang@mediatek.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/85734 Reviewed-by: Yidi Lin yidilin@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Yu-Ping Wu yupingso@google.com --- A src/soc/mediatek/common/include/soc/mt6685.h A src/soc/mediatek/common/mt6685.c M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/mt6685.c M src/soc/mediatek/mt8196/pmif_init.c 5 files changed, 201 insertions(+), 0 deletions(-)
Approvals: Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/mediatek/common/include/soc/mt6685.h b/src/soc/mediatek/common/include/soc/mt6685.h new file mode 100644 index 0000000..5590a1b --- /dev/null +++ b/src/soc/mediatek/common/include/soc/mt6685.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#ifndef __SOC_MEDIATEK_MT6685_H__ +#define __SOC_MEDIATEK_MT6685_H__ + +#include <soc/spmi.h> +#include <types.h> + +struct mt6685_setting { + unsigned short addr; + unsigned short val; + unsigned short mask; + unsigned char shift; +}; + +struct mt6685_key_setting { + unsigned short addr; + unsigned short val; +}; + +void mt6685_init(void); +void mt6685_init_pmif_arb(void); +void mt6685_write_field(u32 reg, u32 val, u32 mask, u32 shift); +u32 mt6685_read_field(u32 reg, u32 mask, u32 shift); +u8 mt6685_read8(u32 reg); +void mt6685_write8(u32 reg, u8 reg_val); +u16 mt6685_read16(u32 reg); +void mt6685_write16(u32 reg, u16 reg_val); +void mt6685_init_setting(void); + +#endif diff --git a/src/soc/mediatek/common/mt6685.c b/src/soc/mediatek/common/mt6685.c new file mode 100644 index 0000000..fa434f4 --- /dev/null +++ b/src/soc/mediatek/common/mt6685.c @@ -0,0 +1,103 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#include <assert.h> +#include <console/console.h> +#include <delay.h> +#include <soc/mt6685.h> +#include <soc/pmif.h> +#include <timer.h> + +#define MT6685_TOP_RST_MISC 0x127 +#define MT6685_TOP_RST_MISC_SET 0x128 + +static struct pmif *pmif_arb; +u32 mt6685_read_field(u32 reg, u32 mask, u32 shift) +{ + assert(pmif_arb); + return pmif_arb->read_field(pmif_arb, SPMI_SLAVE_9, reg, mask, shift); +} + +void mt6685_write_field(u32 reg, u32 val, u32 mask, u32 shift) +{ + assert(pmif_arb); + pmif_arb->write_field(pmif_arb, SPMI_SLAVE_9, reg, val, mask, shift); +} + +u8 mt6685_read8(u32 reg) +{ + u32 rdata = 0; + + assert(pmif_arb); + pmif_arb->read(pmif_arb, SPMI_SLAVE_9, reg, &rdata); + + return (u8)rdata; +} + +void mt6685_write8(u32 reg, u8 reg_val) +{ + assert(pmif_arb); + pmif_arb->write(pmif_arb, SPMI_SLAVE_9, reg, reg_val); +} + +u16 mt6685_read16(u32 reg) +{ + u16 rdata = 0; + + assert(pmif_arb); + pmif_arb->read16(pmif_arb, SPMI_SLAVE_9, reg, &rdata); + return rdata; +} + +void mt6685_write16(u32 reg, u16 reg_val) +{ + assert(pmif_arb); + pmif_arb->write16(pmif_arb, SPMI_SLAVE_9, reg, reg_val); +} + +static void mt6685_wdt_set(void) +{ + mt6685_write_field(MT6685_TOP_RST_MISC_SET, 0x3, 0xFF, 0); +} + +static const struct mt6685_key_setting key_protect_setting[] = { + {0x39E, 0x7A}, + {0x39F, 0x99}, + {0x3A8, 0x15}, + {0x3A9, 0x63}, + {0x3AA, 0x30}, + {0x3AB, 0x63}, + {0x9A5, 0x29}, + {0x9A6, 0x47}, + {0xF98, 0x85}, + {0xF99, 0x66}, +}; +static void mt6685_unlock(bool unlock) +{ + for (int i = 0; i < ARRAY_SIZE(key_protect_setting); i++) + mt6685_write16(key_protect_setting[i].addr, + unlock ? key_protect_setting[i].val : 0); +} + +void mt6685_init_pmif_arb(void) +{ + if (!pmif_arb) { + pmif_arb = get_pmif_controller(PMIF_SPMI, SPMI_MASTER_1); + assert(pmif_arb); + } + + if (pmif_arb->is_pmif_init_done(pmif_arb)) + die("ERROR - Failed to initialize pmif spi"); + + printk(BIOS_INFO, "[%s]CHIP ID = %#x\n", __func__, mt6685_read_field(0xb, 0xFF, 0)); +} + +void mt6685_init(void) +{ + mt6685_init_pmif_arb(); + mt6685_unlock(true); + mt6685_wdt_set(); + mt6685_init_setting(); + mt6685_unlock(false); + printk(BIOS_INFO, "[%s]TOP_RST_MISC = %#x\n", __func__, + mt6685_read_field(MT6685_TOP_RST_MISC, 0xFF, 0)); +} diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index 7fe0889..73661bd 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -35,6 +35,7 @@ romstage-y += ../common/mt6316.c mt6316.c romstage-y += ../common/mt6363.c mt6363.c romstage-y += ../common/mt6373.c mt6373.c +romstage-y += ../common/mt6685.c mt6685.c romstage-y += ../common/mtk_fsp.c romstage-y += mtk_pwrsel.c romstage-y += ../common/pmif_clk.c pmif_clk.c diff --git a/src/soc/mediatek/mt8196/mt6685.c b/src/soc/mediatek/mt8196/mt6685.c new file mode 100644 index 0000000..10ac231 --- /dev/null +++ b/src/soc/mediatek/mt8196/mt6685.c @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#include <console/console.h> +#include <soc/mt6685.h> + +static const struct mt6685_setting init_setting[] = { + {0x18, 0x2, 0x2, 0}, + {0x1A, 0x1F, 0x1F, 0}, + {0x27, 0x10, 0x10, 0}, + {0x8A, 0x0, 0x1F, 0}, + {0x10B, 0x8, 0x8, 0}, + {0x11E, 0x1, 0x1, 0}, + {0x127, 0x2, 0x2, 0}, + {0x193, 0x1, 0x1, 0}, + {0x19C, 0x3, 0xF, 0}, + {0x389, 0x0, 0xFF, 0}, + {0x38A, 0x0, 0x7, 0}, + {0x413, 0x7, 0xFF, 0}, + {0x418, 0x10, 0xF0, 0}, + {0x789, 0x6, 0x6, 0}, + {0x9B3, 0x0, 0x7F, 0}, + {0x9B4, 0x7E, 0x7E, 0}, + {0xF8C, 0x15, 0x15, 0}, + {0xF8D, 0x5, 0x5, 0}, + {0x1B0D, 0xF, 0xF, 0}, + {0x1B0E, 0x1, 0x1, 0}, + {0x1B0F, 0x0, 0x1, 0}, + {0x1B10, 0x7F, 0x7F, 0}, + {0x1B1A, 0x8, 0x8, 0}, + {0x1B89, 0x0, 0x80, 0}, + {0x1B8E, 0x40, 0x40, 0}, + {0x1B99, 0x0, 0x80, 0}, + {0x1B9E, 0x40, 0x40, 0}, + {0x1BA9, 0x0, 0x80, 0}, + {0x1BAE, 0x40, 0x40, 0}, + {0x1BB9, 0x0, 0x80, 0}, + {0x1BC9, 0x0, 0x80, 0}, + {0x1BD9, 0x0, 0x80, 0}, + {0x1C09, 0x0, 0x80, 0}, + {0x1C0B, 0x1, 0x5, 0}, + {0x1C0E, 0xC0, 0xC0, 0}, + {0x1C8E, 0x1, 0x1, 0}, + + /* Add UVLO 2.0 setting, also need to modify dts setting for main pmic */ + {0x7F1, 0x1, 0xF, 0}, + {0x9a3, 0xD, 0x1F, 0}, + {0x9b2, 0x80, 0x80, 0}, + {0xA8b, 0x4, 0x4, 0}, +}; + +static inline void write_field(const struct mt6685_setting *setting) +{ + mt6685_write_field(setting->addr, setting->val, setting->mask, setting->shift); +} + +void mt6685_init_setting(void) +{ + for (int i = 0; i < ARRAY_SIZE(init_setting); i++) + write_field(&init_setting[i]); +} diff --git a/src/soc/mediatek/mt8196/pmif_init.c b/src/soc/mediatek/mt8196/pmif_init.c index 0fda348..0baf720 100644 --- a/src/soc/mediatek/mt8196/pmif_init.c +++ b/src/soc/mediatek/mt8196/pmif_init.c @@ -20,6 +20,8 @@ .pmifid = PMIF_SPMI, .write = pmif_spmi_write, .read = pmif_spmi_read, + .write16 = pmif_spmi_write16, + .read16 = pmif_spmi_read16, .write_field = pmif_spmi_write_field, .read_field = pmif_spmi_read_field, .is_pmif_init_done = pmif_check_init_done, @@ -30,6 +32,8 @@ .pmifid = PMIF_SPMI, .write = pmif_spmi_write, .read = pmif_spmi_read, + .write16 = pmif_spmi_write16, + .read16 = pmif_spmi_read16, .write_field = pmif_spmi_write_field, .read_field = pmif_spmi_read_field, .is_pmif_init_done = pmif_check_init_done, @@ -40,6 +44,8 @@ .pmifid = PMIF_SPMI, .write = pmif_spmi_write, .read = pmif_spmi_read, + .write16 = pmif_spmi_write16, + .read16 = pmif_spmi_read16, .write_field = pmif_spmi_write_field, .read_field = pmif_spmi_read_field, .is_pmif_init_done = pmif_check_init_done,