Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/57148 )
Change subject: soc/amd/common: Change default fast_read spi speed to 33MHz ......................................................................
soc/amd/common: Change default fast_read spi speed to 33MHz
In CB:56884 we discussed changing the default fast_read speed from 66MHz, which some platforms may not be capable of running, to 33MHz, which should be generally suitable for all platforms.
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: Ibf926df6829ffdcbae947aaa245356f219615ce8 --- M src/soc/amd/common/block/spi/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/57148/1
diff --git a/src/soc/amd/common/block/spi/Kconfig b/src/soc/amd/common/block/spi/Kconfig index 8853f6f..c20c119 100644 --- a/src/soc/amd/common/block/spi/Kconfig +++ b/src/soc/amd/common/block/spi/Kconfig @@ -37,7 +37,7 @@ int range 0 5 default 3 if EM100 - default 0 + default 1 help SPI Fast Speed to be programmed by the PSP. 0: 66.66Mhz