Hello Hung-Te Lin, build bot (Jenkins), Julius Werner, Yu-Ping Wu, Duan huayang,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40525
to look at the new patch set (#12).
Change subject: soc/mediatek/mt8183: Set CA and DQ vref range to correct value ......................................................................
soc/mediatek/mt8183: Set CA and DQ vref range to correct value
The CA vref should alway select range[1]. But in fast calibration flow, we missed the range selection and caused the CA vref to use the range[0] value.
The DQ vref should select correct range that corresponds to current frequency, that is for 1600Mbps, 2400Mbps to select range[1], for 3200Mbps and 3600Mbps to select range[0].
Refer to the 'JESD209-4 - Low Power Double Data Rate 4X(LPDDR4X).pdf', used MR12 to set Vref(CA) levels, used MR14 to set VREF(DQ) levels. MR12 range[0] values from 15.0% to 44.9%, range[1] values from 32.9% to 62.9%, MR14 range[0] and range[1] values same as MR12.
BUG=b:153614919 BRANCH=kukui TEST=Boots correctly on Kukui
Change-Id: Ie7680b1bf0c29c946d18e3b27626ce6f31c4216b Signed-off-by: Huayang Duan huayang.duan@mediatek.com --- M src/soc/mediatek/mt8183/dramc_init_setting.c M src/soc/mediatek/mt8183/dramc_pi_calibration_api.c M src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h 3 files changed, 12 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/40525/12