[coreboot-gerrit] Change in coreboot[master]: mb/intel/adlrvp: Add support for LPDDR5

[Subrata Banik (Code Review)]

Subrata Banik has uploaded a new patch set (#13) to the change originally created by Sridhar Siricilla. ( https://review.coreboot.org/c/coreboot/+/46899 )

Change subject: mb/intel/adlrvp: Add support for LPDDR5
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mb/intel/adlrvp: Add support for LPDDR5

This patch adds LPDDR5 memory configuration parameters to FSP.

TEST=Able to pass FSP-M MRC training on LPDDR5 RVP.

Signed-off-by: Sridhar Siricilla 
Change-Id: I787bf97dd6c244bd3b0662e5bd061a2da80baa90
---
M src/mainboard/intel/adlrvp/include/baseboard/variants.h
M src/mainboard/intel/adlrvp/memory.c
M src/mainboard/intel/adlrvp/romstage_fsp_params.c
M src/mainboard/intel/adlrvp/spd/Makefile.inc
A src/mainboard/intel/adlrvp/spd/adlrvp_lp5.spd.hex
5 files changed, 71 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/46899/13