Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47447 )
Change subject: soc/intel/xeon_sp: Lock down PCI BUSx:07.7 registers ......................................................................
Patch Set 2: Code-Review+1
(3 comments)
https://review.coreboot.org/c/coreboot/+/47447/2/src/soc/intel/xeon_sp/cpx/i... File src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h:
https://review.coreboot.org/c/coreboot/+/47447/2/src/soc/intel/xeon_sp/cpx/i... PS2, Line 135: D7F7 IIO DFX Global
https://review.coreboot.org/c/coreboot/+/47447/2/src/soc/intel/xeon_sp/uncor... File src/soc/intel/xeon_sp/uncore.c:
https://review.coreboot.org/c/coreboot/+/47447/2/src/soc/intel/xeon_sp/uncor... PS2, Line 362: 0x3ff Aren't bits 4:3 reserved? I see SKX reference code setting all of them anyway, though
https://review.coreboot.org/c/coreboot/+/47447/2/src/soc/intel/xeon_sp/uncor... PS2, Line 363: 0x30c I think this has a name: IIO_DFX_TSWCTL0