[coreboot-gerrit] [XS] Change in coreboot[main]: soc/intel/cnvi: Increase the reset delay to 160ms from 105ms

[Sean Rhodes (Code Review)]

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86489?usp=email )

(

7 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/intel/cnvi: Increase the reset delay to 160ms from 105ms
......................................................................

soc/intel/cnvi: Increase the reset delay to 160ms from 105ms

The Intel reference code for Thunder Peak increase the reset delay
to 160ms from 105ms seen on Jefferson Peak, Cyclone Peak and others.

For the sake of 110ms, use 160ms to cover all use cases.

Change-Id: I19c1bf7eeffa340e2564381a184ebfaca89bf364
Signed-off-by: Sean Rhodes 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86489
Tested-by: build bot (Jenkins) 
Reviewed-by: Matt DeVillier 
---
M src/soc/intel/common/block/cnvi/cnvi.c
1 file changed, 4 insertions(+), 4 deletions(-)

Approvals:
  Matt DeVillier: Looks good to me, approved
  build bot (Jenkins): Verified

diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c
index f082197..e23ada8 100644
--- a/src/soc/intel/common/block/cnvi/cnvi.c
+++ b/src/soc/intel/common/block/cnvi/cnvi.c
@@ -133,7 +133,7 @@
  *							If ((_SB.PCI0.GBTR() == One))
  *							{
  *								_SB.PCI0.BTRK (Zero)
- *								Sleep (105)
+ *								Sleep (160
  *								Local2 = One
  *							}
  *						}
@@ -146,7 +146,7 @@
  *							If ((Local2 == One))
  *							{
  *								_SB.PCI0.BTRK (One)
- *								Sleep (105)
+ *								Sleep (160)
  *							}
  *						}
  *						Else
@@ -242,7 +242,7 @@
    							acpigen_emit_namestring("\_SB.PCI0.BTRK");
    							acpigen_emit_byte(0);

-								acpigen_write_sleep(105);
+								acpigen_write_sleep(160);

acpigen_write_store_ops(1, LOCAL2_OP);
    						}
@@ -283,7 +283,7 @@
    							{
    								acpigen_emit_namestring("\_SB.PCI0.BTRK");
    								acpigen_emit_byte(1);
-									acpigen_write_sleep(105);
+									acpigen_write_sleep(160);
    							}
    							acpigen_pop_len();
    						}