[coreboot-gerrit] Change in coreboot[master]: mb/google/brya: Set CNVi Bluetooth pin muxes

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51111 )

Change subject: mb/google/brya: Set CNVi Bluetooth pin muxes
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mb/google/brya: Set CNVi Bluetooth pin muxes

Brya uses GPP_F5 for CNVi CLKREQ# and GPP_F4 for RF_RESET#.

TEST=`lsusb -v | grep Bluetooth`

Signed-off-by: Tim Wawrzynczak 
Change-Id: I067ebbfb28fff52f93982493f5d54147a61591a3
---
M src/mainboard/google/brya/variants/baseboard/devicetree.cb
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/51111/1

diff --git a/src/mainboard/google/brya/variants/baseboard/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/devicetree.cb
index d82a9eb..8eeebe6 100644
--- a/src/mainboard/google/brya/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/devicetree.cb
@@ -19,6 +19,9 @@
    register "gpio_pm[COMM_4]" = "0"
    register "gpio_pm[COMM_5]" = "0"

+	register "CnviClkreqPinMux" = "CNVI_CLKREQ_GPP_F5"
+	register "CnviRfResetPinMux" = "CNVI_RF_RESET_GPP_F4"
+
    register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)"	# USB2_C0
    register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC1)"	# USB2_C1
    register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)"	# USB2_C2