[coreboot-gerrit] Change in coreboot[master]: mb/google/hatch: Update GCPM method from SoC

[EricR Lai (Code Review)]

EricR Lai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37691 )

Change subject: mb/google/hatch: Update GCPM method from SoC
......................................................................

mb/google/hatch: Update GCPM method from SoC

Moving Enable/disable GPIO clock gating to soc level.

Signed-off-by: Eric Lai 
Change-Id: I9be77908b4e44e08a707812fd8b23b23bcb56671
---
M src/mainboard/google/hatch/mainboard.asl
1 file changed, 2 insertions(+), 25 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/37691/1

diff --git a/src/mainboard/google/hatch/mainboard.asl b/src/mainboard/google/hatch/mainboard.asl
index dff1a75..78129d0 100644
--- a/src/mainboard/google/hatch/mainboard.asl
+++ b/src/mainboard/google/hatch/mainboard.asl
@@ -15,21 +15,13 @@

#include <intelblocks/gpio.h>

-Method (LOCL, 1, Serialized)
-{
-	For (Local0 = 0, Local0 < 5, Local0++)
-	{
-		_SB.PCI0.CGPM (Local0, Arg0)
-	}
-}
-
 /*
  * Method called from _PTS prior to system sleep state entry
  * Enables dynamic clock gating for all 5 GPIO communities
  */
 Method (MPTS, 1, Serialized)
 {
-	LOCL (MISCCFG_ENABLE_GPIO_PM_CONFIG)
+	_SB.PCI0.GCPM (MISCCFG_ENABLE_GPIO_PM_CONFIG)
 }

/*
@@ -38,20 +30,5 @@
  */
 Method (MWAK, 1, Serialized)
 {
-	LOCL (0)
-}
-
-/*
- * S0ix Entry/Exit Notifications
- * Called from _SB.LPID._DSM
- */
-Method (MS0X, 1, Serialized)
-{
-	If (Arg0 == 1) {
-		/* S0ix Entry */
-		LOCL (MISCCFG_ENABLE_GPIO_PM_CONFIG)
-	} Else {
-		/* S0ix Exit */
-		LOCL (0)
-	}
+	_SB.PCI0.GCPM (0)
 }