[coreboot-gerrit] Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS

[Tim Crawford (Code Review)]

Attention is currently required from: Sean Rhodes, SRIDHAR SIRICILLA, Furquan Shaikh, Paul Menzel, Rizwan Qureshi, Tim Wawrzynczak, Subrata Banik, Angel Pons, Sridhar Siricilla, Arthur Heymans, Patrick Rudolph.
Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52800 )

Change subject: soc/intel: Allow enable/disable ME via CMOS
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Patch Set 68:

(2 comments)

Patchset:

PS68: 
Also, I didn't realize someone else was doing this and did this in CB:57541 as part of rebasing our fork.

File src/soc/intel/common/block/cse/cse.c:

https://review.coreboot.org/c/coreboot/+/52800/comment/625be53c_8bfe455a 
PS68, Line 921: 	struct mkhi_hdr reply;
> See L924

That's the message. It's required for the *response* as well.