Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39371 )
Change subject: mb/asus/f2a85-m: Copy Super I/O CR values from vendor firmware ......................................................................
mb/asus/f2a85-m: Copy Super I/O CR values from vendor firmware
Here is the relevant output of `superiotool` for the global control registers:
Found Nuvoton NCT6779D (id=0xc562) at 0x2e Register dump: idx 10 11 13 14 1a 1b 1c 1d 20 21 22 24 25 26 27 28 2a 2b 2c 2f val ff ff ff ff 3a 28 00 10 c5 62 df 04 00 00 10 00 48 20 00 01 def ff ff 00 00 30 70 10 00 c5 62 ff 04 00 MM 00 00 c0 00 01 MM
The serial console still does not work.
Change-Id: I0aa367316f274ed0dd5964ba5ed045b9aeaccf8d Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de --- M src/mainboard/asus/f2a85-m/bootblock.c 1 file changed, 14 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/39371/1
diff --git a/src/mainboard/asus/f2a85-m/bootblock.c b/src/mainboard/asus/f2a85-m/bootblock.c index 3d980a6..cbd6e3a 100644 --- a/src/mainboard/asus/f2a85-m/bootblock.c +++ b/src/mainboard/asus/f2a85-m/bootblock.c @@ -15,6 +15,7 @@ */
#include <bootblock_common.h> +#include <device/pnp_ops.h> #include <device/pnp_type.h> #include <amdblocks/acpimmio.h> #include <stdint.h> @@ -47,8 +48,21 @@
static void superio_init_m_pro(void) { + pnp_devfn_t global_dev = PNP_DEV(0x2e, 0); pnp_devfn_t uart = PNP_DEV(0x2e, NCT6779D_SP1);
+ pnp_write_config(global_dev, 0x13, 0xff); + pnp_write_config(global_dev, 0x14, 0xff); + pnp_write_config(global_dev, 0x1a, 0x0a); + pnp_write_config(global_dev, 0x1b, 0x28); + pnp_write_config(global_dev, 0x1c, 0x00); + pnp_write_config(global_dev, 0x1d, 0x10); + pnp_write_config(global_dev, 0x22, 0xdf); + pnp_write_config(global_dev, 0x2a, 0x48); + pnp_write_config(global_dev, 0x2b, 0x20); + pnp_write_config(global_dev, 0x2c, 0x00); + pnp_write_config(global_dev, 0x2f, 0x01); + nuvoton_enable_serial(uart, CONFIG_TTYS0_BASE); }