Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41049 )
Change subject: nb/intel/i440bx: Refactor ACPI code
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Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41049/3/src/northbridge/intel/i440b...
File src/northbridge/intel/i440bx/acpi/sb_pci0_crs.asl:
https://review.coreboot.org/c/coreboot/+/41049/3/src/northbridge/intel/i440b...
PS3, Line 62: ShiftLeft(0x10000000, 4, Local0)
I actually have concerns after checking the disassembly. […]
I think this is intentional. After all, this chipset can handle at most 4 GiB of memory, right?
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I2c74ef30a9bb48e02154f963b1ca3a4f5f3004df
Gerrit-Change-Number: 41049
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