[coreboot-gerrit] Change in coreboot[master]: soc/intel/alderlake: Refactor meminit code

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48860 )

Change subject: soc/intel/alderlake: Refactor meminit code
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Patch Set 2:

(1 comment)

https://review.coreboot.org/c/coreboot/+/48860/2/src/soc/intel/alderlake/mem... 
File src/soc/intel/alderlake/meminit.c:

https://review.coreboot.org/c/coreboot/+/48860/2/src/soc/intel/alderlake/mem... 
PS2, Line 100: init_dq_upds
BTW, what do you think about this:

Define new dq_map and dqs_map structures within meminit.c that represent the 8-byte pairs without taking into account any specific memory technology.

struct dq_map {
       uint8_t dq0[BITS_PER_BYTE];
       uint8_t dq1[BITS_PER_BYTE];
};

struct dqs_map {
       uint8_t dqs0;
       uint8_t dqs1;
};

And those can be used to pass in the dq_map and dqs_map by all the meminit_* functions.

#define TOTAL_BYTE_PAIRS 8

static void init_dq_table(FSP_M_CONFIG *mem_cfg, struct dq_map *dq_map_ptr, bool half_populated)
{
    int total_pairs = half_populated ? TOTAL_BYTE_PAIRS / 2 : TOTAL_BYTE_PAIRS;

for (i = 0; i < total_pairs; i++, dq_map_ptr++) {
           init_dq_upds(mem_cfg, i, dq_map_ptr.dq0, dq_map_ptr.dq1);
    }

for (; i < TOTAL_BYTE_PAIRS; i++) {
           init_dq_upds_empty(mem_cfg, i);
    }
}

This should reduce the calls in `meminit_lpx()` and `meminit_ddr()` to:

init_dq_table(mem_cfg, board_cfg->dq_map, half_populated);
init_dqs_table(mem_cfg, board_cfg->dqs_map, half_populated);

Probably cleans up the functions and makes it easier to read? Also, if we really have to support a different channel configuration for DDR5, it won't result in a lot of additional code.