[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD.

[Paul Fagerburg (Code Review)]

Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32791 )

Change subject: soc/intel/cannonlake: Configure SPI CS parameters in FSP UPD.
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Patch Set 6: Code-Review+1

(1 comment)

https://review.coreboot.org/#/c/32791/5/src/soc/intel/cannonlake/fsp_params.... 
File src/soc/intel/cannonlake/fsp_params.c:

https://review.coreboot.org/#/c/32791/5/src/soc/intel/cannonlake/fsp_params.... 
PS5, Line 403: (
> True, I just know that sometimes I forget the precedence and that keeps things clear. […]

I think parens improve readability in this case, and would favor keeping them.