Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel, Elyes Haouas.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64780 )
Change subject: device/dram: Reformat code ......................................................................
Patch Set 4:
(2 comments)
File src/device/dram/ddr2.c:
https://review.coreboot.org/c/coreboot/+/64780/comment/2e30e928_ab522255 PS1, Line 30:
Doesn't have to be done in this patch, but maybe we should use a switch-case here?
Original problem seems to be resolved now.
File src/device/dram/ddr4.c:
https://review.coreboot.org/c/coreboot/+/64780/comment/49fecd37_74c4d4fe PS4, Line 44: [DDR4_3200] = {.min_clock_mhz = 1467, .max_clock_mhz = 1600, .reported_mts = 3200} I'd prefer to right-align the numbers, so that the table columns are aligned:
``` /* clang-format off */ [DDR4_1600] = {.min_clock_mhz = 668, .max_clock_mhz = 800, .reported_mts = 1600}, [DDR4_1866] = {.min_clock_mhz = 801, .max_clock_mhz = 934, .reported_mts = 1866}, [DDR4_2133] = {.min_clock_mhz = 935, .max_clock_mhz = 1067, .reported_mts = 2133}, [DDR4_2400] = {.min_clock_mhz = 1068, .max_clock_mhz = 1200, .reported_mts = 2400}, [DDR4_2666] = {.min_clock_mhz = 1201, .max_clock_mhz = 1333, .reported_mts = 2666}, [DDR4_2933] = {.min_clock_mhz = 1334, .max_clock_mhz = 1466, .reported_mts = 2933}, [DDR4_3200] = {.min_clock_mhz = 1467, .max_clock_mhz = 1600, .reported_mts = 3200}, /* clang-format on */ ```
Gerrit wraps the lines, but the point is to add a space to the left of 3-digit values so that they're aligned with 4-digit values. I know clang-format does not approve of visual alignment, but we can also turn off clang-format for the table only.