Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35128 )
Change subject: ec/google/chromeec: Add config option for eSPI ......................................................................
ec/google/chromeec: Add config option for eSPI
The Intel platforms using eSPI EC communication have just been enabling the EC_GOOGLE_CHROMEEC_LPC option for simplicity. This does basically the same, but at least marks it as eSPI in Kconfig for clarity.
BUG=b:140055300 TEST=Build tested only.
Change-Id: Ib56ec9d1dc204809a05c846494ff0e0d69cf70ea Signed-off-by: Martin Roth martinroth@google.com --- M src/ec/google/chromeec/Kconfig 1 file changed, 10 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/35128/1
diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig index 3eb2c48..8c7d24e 100644 --- a/src/ec/google/chromeec/Kconfig +++ b/src/ec/google/chromeec/Kconfig @@ -47,6 +47,16 @@ help Use only proto3 for i2c EC communication.
+config EC_GOOGLE_CHROMEEC_ESPI + depends on EC_GOOGLE_CHROMEEC && ARCH_X86 # Needs Plug-and-play. + def_bool n + select EC_GOOGLE_CHROMEEC_LPC + help + Google Chrome EC via eSPI bus. + The EC communication code is the same between eSPI and LPC, so + this option simply enables the LPC EC code. The eSPI device + still needs to correctly configure the bus transactions. + config EC_GOOGLE_CHROMEEC_LPC depends on EC_GOOGLE_CHROMEEC && ARCH_X86 # Needs Plug-and-play. def_bool y