Sathyanarayana Nujella (sathyanarayana.nujella@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17199
-gerrit
commit bab4bb28d52eaf2b6772a715d304d90daf6c7ccf Author: Sathyanarayana Nujella sathyanarayana.nujella@intel.com Date: Mon Oct 31 10:48:43 2016 -0700
mainboard/google/reef: update DMIC related pins configuration
CLK_B1(GPIO_80) and DATA_2(GPIO_83) pins needs to be configured as native mode to use them for DMIC record on other potential DMIC's.
DMIC blobs configure the clocks. For stereo & quad channel record, both CLK_A1 and CLK_B1 are enabled. For mono channel record, only CLK_A1 is enabled.
BUG=chrome-os-partner:56918 BRANCH=None TEST=During DMIC record, check CLK_B1 and DATA_2 lines
Change-Id: I838009b85190de5360d593238e48c9593c1dc43a Signed-off-by: Sathyanarayana Nujella sathyanarayana.nujella@intel.com --- src/mainboard/google/reef/variants/baseboard/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c index c9fa3d3..ae84e9c 100644 --- a/src/mainboard/google/reef/variants/baseboard/gpio.c +++ b/src/mainboard/google/reef/variants/baseboard/gpio.c @@ -219,10 +219,10 @@ static const struct pad_config gpio_table[] = {
/* DMIC or I2S4 */ PAD_CFG_NF(GPIO_79, NATIVE, DEEP, NF1), /* AVS_DMIC_CLK_A1 */ - PAD_CFG_GPI(GPIO_80, UP_20K, DEEP), /* unused */ + PAD_CFG_NF(GPIO_80, NATIVE, DEEP, NF1), /* AVS_DMIC_CLK_B1 */ PAD_CFG_NF(GPIO_81, NATIVE, DEEP, NF1), /* AVS_DMIC_DATA_1 */ PAD_CFG_GPI(GPIO_82, DN_20K, DEEP), /* unused -- strap */ - PAD_CFG_GPI(GPIO_83, UP_20K, DEEP), /* unused */ + PAD_CFG_NF(GPIO_83, NATIVE, DEEP, NF1), /* AVS_DMIC_DATA_2 */
/* I2S2 -- Headset amp */ PAD_CFG_NF(GPIO_84, NATIVE, DEEP, NF1), /* AVS_I2S2_MCLK */