[coreboot-gerrit] Change in coreboot[master]: soc/intel: Fix typo in comment

[Angel Pons (Code Review)]

Attention is currently required from: Patrick Rudolph.
Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52106 )

Change subject: soc/intel: Fix typo in comment
......................................................................

soc/intel: Fix typo in comment

rotine ---> routine

Change-Id: I21a71f52d2ec7a05ea3dadf30e8f3e8dac07d168
Signed-off-by: Angel Pons 
---
M src/soc/intel/cannonlake/gpio_common.c
M src/soc/intel/elkhartlake/chip.c
M src/soc/intel/icelake/chip.c
M src/soc/intel/jasperlake/chip.c
M src/soc/intel/tigerlake/chip.c
5 files changed, 5 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/52106/1

diff --git a/src/soc/intel/cannonlake/gpio_common.c b/src/soc/intel/cannonlake/gpio_common.c
index 21a5801..2c2dcdb 100644
--- a/src/soc/intel/cannonlake/gpio_common.c
+++ b/src/soc/intel/cannonlake/gpio_common.c
@@ -5,7 +5,7 @@

/*
  * Routine to perform below operations:
- * 1. SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register
+ * 1. SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register
  * 2. Program GPIO PM configuration based on PM mask and value
  */
 void soc_gpio_pm_configuration(void)
diff --git a/src/soc/intel/elkhartlake/chip.c b/src/soc/intel/elkhartlake/chip.c
index b14edd6..3917ea0 100644
--- a/src/soc/intel/elkhartlake/chip.c
+++ b/src/soc/intel/elkhartlake/chip.c
@@ -98,7 +98,7 @@
 }
 #endif

-/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
+/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
 static void soc_fill_gpio_pm_configuration(void)
 {
    uint8_t value[TOTAL_GPIO_COMM];
diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c
index 821a9e0..32b1830 100644
--- a/src/soc/intel/icelake/chip.c
+++ b/src/soc/intel/icelake/chip.c
@@ -88,7 +88,7 @@
 }
 #endif

-/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
+/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
 static void soc_fill_gpio_pm_configuration(void)
 {
    uint8_t value[TOTAL_GPIO_COMM];
diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c
index 1051fbc..ea29fd8 100644
--- a/src/soc/intel/jasperlake/chip.c
+++ b/src/soc/intel/jasperlake/chip.c
@@ -104,7 +104,7 @@
 }
 #endif

-/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
+/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
 static void soc_fill_gpio_pm_configuration(void)
 {
    uint8_t value[TOTAL_GPIO_COMM];
diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c
index 2a0d7d0..1affcce 100644
--- a/src/soc/intel/tigerlake/chip.c
+++ b/src/soc/intel/tigerlake/chip.c
@@ -109,7 +109,7 @@
 }
 #endif

-/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */
+/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */
 static void soc_fill_gpio_pm_configuration(void)
 {
    uint8_t value[TOTAL_GPIO_COMM];