[coreboot-gerrit] Change in coreboot[master]: sc7280: Limit SPI-NOR size

[Ravi kumar (Code Review)]

Hello Sajida Bhanu,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/47145

to review the following change.

Change subject: sc7280: Limit SPI-NOR size
......................................................................

sc7280: Limit SPI-NOR size

Limit SPI-NOR size to 8MB.

Change-Id: I31f788b5280636aca3e7e557db3e9ee53320d50d
Signed-off-by: Shaik Sajida Bhanu 
---
M src/drivers/spi/stmicro.c
M src/mainboard/google/herobrine/Kconfig
2 files changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/47145/1

diff --git a/src/drivers/spi/stmicro.c b/src/drivers/spi/stmicro.c
index 4cd8c1b..b02edf6 100644
--- a/src/drivers/spi/stmicro.c
+++ b/src/drivers/spi/stmicro.c
@@ -189,7 +189,7 @@
    {
    	/* N25Q256..1E */
    	.id[0] = STM_ID_N25Q256__1E,
-		.nr_sectors_shift = 13,
+		.nr_sectors_shift = 11,
    },
 };

diff --git a/src/mainboard/google/herobrine/Kconfig b/src/mainboard/google/herobrine/Kconfig
index 92f77db..b92136d 100644
--- a/src/mainboard/google/herobrine/Kconfig
+++ b/src/mainboard/google/herobrine/Kconfig
@@ -14,7 +14,7 @@
    select RTC
    select SOC_QUALCOMM_SC7280
    select SPI_FLASH
-	select SPI_FLASH_WINBOND
+	select SPI_FLASH_STMICRO
    select MAINBOARD_HAS_CHROMEOS

config VBOOT