Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40904 )
Change subject: soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding ......................................................................
soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding
BIT 1 -> DEBUG_INTERFACE_ISA_SERIAL BIT 4 -> DEBUG_INTERFACE_LPSS_SERIAL_IO
Change-Id: I566b9dc82b2289af42e58705ebeee51179886f1f Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/jasperlake/chip.h M src/soc/intel/jasperlake/romstage/fsp_params.c M src/soc/intel/tigerlake/chip.h M src/soc/intel/tigerlake/romstage/fsp_params.c 4 files changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/40904/1
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h index 3983d03..4bdbb11 100644 --- a/src/soc/intel/jasperlake/chip.h +++ b/src/soc/intel/jasperlake/chip.h @@ -198,9 +198,9 @@ /* Debug interface selection */ enum { DEBUG_INTERFACE_RAM = (1 << 0), - DEBUG_INTERFACE_UART = (1 << 1), + DEBUG_INTERFACE_ISA_SERIAL = (1 << 1), DEBUG_INTERFACE_USB3 = (1 << 3), - DEBUG_INTERFACE_SERIAL_IO = (1 << 4), + DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4), DEBUG_INTERFACE_TRACEHUB = (1 << 5), } debug_interface_flag;
diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c index a841809..89dd89a 100644 --- a/src/soc/intel/jasperlake/romstage/fsp_params.c +++ b/src/soc/intel/jasperlake/romstage/fsp_params.c @@ -60,7 +60,7 @@
/* Set debug interface flags */ m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ? - DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO; + DEBUG_INTERFACE_ISA_SERIAL : DEBUG_INTERFACE_LPSS_SERIAL_IO;
/* TraceHub configuration */ dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB); diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h index a3319d4..fa53371 100644 --- a/src/soc/intel/tigerlake/chip.h +++ b/src/soc/intel/tigerlake/chip.h @@ -195,9 +195,9 @@ /* Debug interface selection */ enum { DEBUG_INTERFACE_RAM = (1 << 0), - DEBUG_INTERFACE_UART = (1 << 1), + DEBUG_INTERFACE_ISA_SERIAL = (1 << 1), DEBUG_INTERFACE_USB3 = (1 << 3), - DEBUG_INTERFACE_SERIAL_IO = (1 << 4), + DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4), DEBUG_INTERFACE_TRACEHUB = (1 << 5), } debug_interface_flag;
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c index b4521e2..ead20ff 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params.c @@ -71,7 +71,7 @@
/* Set debug interface flags */ m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ? - DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO; + DEBUG_INTERFACE_ISA_SERIAL : DEBUG_INTERFACE_LPSS_SERIAL_IO;
/* TraceHub configuration */ dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);