Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/20945 )
Change subject: ec/google: update ec_commands.h ......................................................................
ec/google: update ec_commands.h
Copy from chrome-ec codebase, except for keeping the long-form license header.
BUG=b:64468585 BRANCH=none TEST=with the other sku-id related patches applied, coreboot obtains the right SKU ID from EC
Change-Id: I513123547f3854945e827d2f7f6c0df6591886eb Signed-off-by: Patrick Georgi pgeorgi@google.com Reviewed-on: https://review.coreboot.org/20945 Reviewed-by: Martin Roth martinroth@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/ec/google/chromeec/ec_commands.h 1 file changed, 31 insertions(+), 2 deletions(-)
Approvals: Martin Roth: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h index 3e093f6..46ab905 100644 --- a/src/ec/google/chromeec/ec_commands.h +++ b/src/ec/google/chromeec/ec_commands.h @@ -31,7 +31,7 @@ #ifndef __CROS_EC_EC_COMMANDS_H #define __CROS_EC_EC_COMMANDS_H
-#ifndef __ACPI__ +#if !defined(__ACPI__) && !defined(__KERNEL__) #include <stdint.h> #endif
@@ -1121,6 +1121,14 @@ };
/*****************************************************************************/ +/* Get the board's SKU ID from EC */ +#define EC_CMD_GET_SKU_ID 0x000E + +struct __ec_align4 ec_response_sku_id { + uint32_t sku_id; +}; + +/*****************************************************************************/ /* Flash commands */
/* Get flash info */ @@ -1151,6 +1159,13 @@ /* Flags for version 1+ flash info command */ /* EC flash erases bits to 0 instead of 1 */ #define EC_FLASH_INFO_ERASE_TO_0 (1 << 0) + +/* Flash must be selected for read/write/erase operations to succeed. This may + * be necessary on a chip where write/erase can be corrupted by other board + * activity, or where the chip needs to enable some sort of programming voltage, + * or where the read/write/erase operations require cleanly suspending other + * chip functionality. */ +#define EC_FLASH_INFO_SELECT_REQUIRED (1 << 1)
/* * Version 1 returns the same initial fields as version 0, with additional @@ -1421,6 +1436,16 @@ /* Status registers from command 0x05 and 0x35 */ uint8_t sr1, sr2; }; + + +/* Select flash during flash operations */ +#define EC_CMD_FLASH_SELECT 0x0019 + +struct __ec_align4 ec_params_flash_select { + /* 1 to select flash, 0 to deselect flash */ + uint8_t select; +}; +
/*****************************************************************************/ /* PWM commands */ @@ -2980,6 +3005,7 @@ #define EC_MKBP_POWER_BUTTON 0 #define EC_MKBP_VOL_UP 1 #define EC_MKBP_VOL_DOWN 2 +#define EC_MKBP_RECOVERY 3
/* Switches */ #define EC_MKBP_LID_OPEN 0 @@ -3935,6 +3961,9 @@
#define EC_CMD_USB_PD_PORTS 0x0102
+/* Maximum number of PD ports on a device, num_ports will be <= this */ +#define EC_USB_PD_MAX_PORTS 8 + struct __ec_align1 ec_response_usb_pd_ports { uint8_t num_ports; }; @@ -4425,6 +4454,6 @@ #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE
-#endif /* !__ACPI__ */ +#endif /* !__ACPI__ && !__KERNEL__ */
#endif /* __CROS_EC_EC_COMMANDS_H */