Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36198 )
Change subject: soc/intel/braswell: Update microcode before FSP
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Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36198/3//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/36198/3//COMMIT_MSG@9
PS3, Line 9: The google FSP Braswell version has broken microcode update code and
: FSP checks at some point if the installed microcode version is non
: zero, so coreboot has to update it before calling FSP-T.
:
: This is fixed with newer FSP releases by Intel, but doing updates
: won't hurt.
This should probably go into the code to explain why things are done 'twice'.
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