Roy Park has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32552 )
Change subject: mb/google/sarien: Fine tune SD card D3 cold timing
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Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/#/c/32552/1/src/mainboard/google/sarien/variants...
File src/mainboard/google/sarien/variants/sarien/gpio.c:
https://review.coreboot.org/#/c/32552/1/src/mainboard/google/sarien/variants...
PS1, Line 244: PAD_CFG_GPO(GPP_H12, 1, DEEP),
It would still get deasserted if we put the second GPIO setup into the normal table, it would just h […]
First, the total time of RESET asserted was very short when we checked the asserted RESET time. and it could be not good enough time to be recognized as LOW.
Second,when RESET pin was deasserted in the normal table, the total time of the asserted RESET was took too much long time.
To avoid these two concerns, we deasserted RESET pin in this early table.
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