[coreboot-gerrit] Change in coreboot[master]: soc/intel/apl,skl,cnl,icl: implement a PRMRR size selection algorithm

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35902 )

Change subject: soc/intel/apl,skl,cnl,icl: implement a PRMRR size selection algorithm
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Patch Set 7:

(1 comment)

https://review.coreboot.org/c/coreboot/+/35902/7//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/35902/7//COMMIT_MSG@34 
PS7, Line 34: Todo: needs testing
> kindly help to test on CNL and ICL variants ? […]

Testers are welcome! :-) Well, currently nobody knows, what FSP-M does... this was before my CR and will be the same after. I am currently reverse engineering PRMRR related stuff to get more details but that will take some time...